Allow the specification of explicit alignments for constant pool entries. (32be2dc0) · Commits · Roger Ferrer / llvm-epi-0.8 · GitLab

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32be2dc0

Commit 32be2dc0 authored 19 years ago by Evan Cheng

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Allow the specification of explicit alignments for constant pool entries.

llvm-svn: 25855

parent c642aa5e

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Changes 13

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llvm/include/llvm/CodeGen/MachineConstantPool.h 11 additions, 6 deletions

llvm/include/llvm/CodeGen/MachineConstantPool.h
llvm/include/llvm/CodeGen/SelectionDAG.h 6 additions, 4 deletions

llvm/include/llvm/CodeGen/SelectionDAG.h
llvm/include/llvm/CodeGen/SelectionDAGNodes.h 7 additions, 1 deletion

llvm/include/llvm/CodeGen/SelectionDAGNodes.h
llvm/lib/CodeGen/AsmPrinter.cpp 9 additions, 5 deletions

llvm/lib/CodeGen/AsmPrinter.cpp
llvm/lib/CodeGen/MachineFunction.cpp 5 additions, 2 deletions

llvm/lib/CodeGen/MachineFunction.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp 2 additions, 1 deletion

llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp 14 additions, 8 deletions

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp 6 additions, 4 deletions

llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp
llvm/lib/Target/Alpha/AlphaISelLowering.cpp 3 additions, 2 deletions

llvm/lib/Target/Alpha/AlphaISelLowering.cpp
llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp 4 additions, 2 deletions

llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp 3 additions, 2 deletions

llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp 2 additions, 1 deletion

llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
llvm/lib/Target/SparcV9/SparcV9AsmPrinter.cpp 8 additions, 5 deletions

llvm/lib/Target/SparcV9/SparcV9AsmPrinter.cpp

with 80 additions and 43 deletions

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