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Commit 3adf9b8d authored by Kai Nacke's avatar Kai Nacke
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[mips] Add new format for dmtc2/dmfc2 for Octeon CPUs.

Octeon CPUs use dmtc2 rt,imm16 and dmfcp2 rt,imm16 for the crypto coprocessor.
E.g. dmtc2 rt,0x4057 starts calculation of sha-1.

I had to introduce a new deconding namespace to avoid a decoding conflict.

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D10083

llvm-svn: 238439
parent 39db0f62
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