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Commit 44cc5543 authored by Evan Cheng's avatar Evan Cheng
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DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead... 

DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.

llvm-svn: 62519
parent 0346c04f
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