Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When
set, these flags indicate the instructions source / def operands have special register allocation requirement that are not captured in their register classes. Post-allocation passes (e.g. post-alloc scheduler) should not change their allocations. e.g. ARM::LDRD require the two definitions to be allocated even / odd register pair. llvm-svn: 83196
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