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Commit 624b02aa authored by Michel Danzer's avatar Michel Danzer
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R600/SI: Fix fneg for 0.0



V_ADD_F32 with source modifier does not produce -0.0 for this. Just
manipulate the sign bit directly instead.

Also add a pattern for (fneg (fabs ...)).

Fixes a bunch of bit encoding piglit tests with radeonsi.

Reviewed-by: default avatarTom Stellard <thomas.stellard@amd.com>
llvm-svn: 200743
parent 8aaa44c4
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