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Commit 78af38c3 authored by Evan Cheng's avatar Evan Cheng
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Handle vector move / load which zero the destination register top bits (i.e.... 

Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine.

llvm-svn: 50838
parent 0d6311d4
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