Reapply r54147 with a constraint to only use the 8-bit
subreg form on x86-64, to avoid the problem with x86-32 having GPRs that don't have 8-bit subregs. Also, change several 16-bit instructions to use equivalent 32-bit instructions. These have a smaller encoding and avoid partial-register updates. llvm-svn: 54223
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- llvm/lib/Target/X86/X86Instr64bit.td 39 additions, 15 deletionsllvm/lib/Target/X86/X86Instr64bit.td
- llvm/lib/Target/X86/X86InstrInfo.td 22 additions, 10 deletionsllvm/lib/Target/X86/X86InstrInfo.td
- llvm/test/CodeGen/X86/zext-inreg-0.ll 51 additions, 0 deletionsllvm/test/CodeGen/X86/zext-inreg-0.ll
- llvm/test/CodeGen/X86/zext-inreg-1.ll 13 additions, 0 deletionsllvm/test/CodeGen/X86/zext-inreg-1.ll
- llvm/test/CodeGen/X86/zext-inreg-2.ll 28 additions, 0 deletionsllvm/test/CodeGen/X86/zext-inreg-2.ll
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