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Commit 8adb9944 authored by Vikram S. Adve's avatar Vikram S. Adve
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Added special register class containing (for now) %fsr. 

Fixed spilling of %fcc[0-3] which are part of %fsr.
Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.

llvm-svn: 6339
parent 196897c4
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