Skip to content
Commit 8ce1ada1 authored by Kevin Enderby's avatar Kevin Enderby
Browse files

Fix a bug in the ARM disassembler for wide branch conditional instructions 

where the symbolic operand's displacement was incorrectly shifted left by 1.
rdar://11387046

llvm-svn: 156212
parent fd727748
Hide whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment