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Commit 96adc4a5 authored by Owen Anderson's avatar Owen Anderson
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Add a new MVT::untyped. This will be used in future work for modelling ISA...

Add a new MVT::untyped.  This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers).  We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them.  Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match.

llvm-svn: 133106
parent 99f35eab
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