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Commit a5d1fc2c authored by Craig Topper's avatar Craig Topper
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Make FMA4 imply AVX so that YMM registers would be available. Necessitates... 

Make FMA4 imply AVX so that YMM registers would be available. Necessitates removing from Bulldozer CPU types since it would enable AVX code generation implicitly. Also make SSE4A imply SSE3. Without some level of SSE implied, XMM registers wouldn't be legal.

llvm-svn: 147369
parent 2ba766ae
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