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Commit aa8b9993 authored by Jessica Paquette's avatar Jessica Paquette
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[AArch64][GlobalISel] Select @llvm.aarch64.stlxr for 32-bit pointers

Add partial instruction selection for intrinsics like this:

```
declare i32 @llvm.aarch64.stlxr(i64, i32*)
```

(This only handles the case where a G_ZEXT is feeding the intrinsic.)

Also make sure that the added store instruction actually has the memory op from
the original G_STORE.

Update select-stlxr-intrin.mir and arm64-ldxr-stxr.ll.

Differential Revision: https://reviews.llvm.org/D65355

llvm-svn: 367163
parent f5a33836
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