Skip to content
Commit abeb79ee authored by Craig Topper's avatar Craig Topper
Browse files

Add instruction selection support for horizontal add/sub of 256-bit floating...

Add instruction selection support for horizontal add/sub of 256-bit floating point vectors. Also add the test case for 256-bit integer vectors.

llvm-svn: 145680
parent f9ce7b60
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment