Skip to content
Commit aef5bdbe authored by Simon Pilgrim's avatar Simon Pilgrim
Browse files

[X86][BtVer2] Add support for all vector instructions that should match the... 

[X86][BtVer2] Add support for all vector instructions that should match the dependency-breaking 'zero-idiom'

As detailed on Agner's Microarchitecture doc (21.8 AMD Bobcat and Jaguar pipeline - Dependency-breaking instructions), all these instructions are dependency breaking and zero the destination register.

llvm-svn: 334119
parent 6d354ed7
Expand all Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment