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Commit cc6659b2 authored by Bruno Cardoso Lopes's avatar Bruno Cardoso Lopes
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The Mips specific function for instruction cache invalidation cannot be

compiled on mips32r1 processors because it uses synci and rdhwr instructions
which are supported only on mips32r2, so I replaced this function with the
call to function cacheflush which works for both mips32r1 and mips32r2.
Patch by Sasa Stankovic

llvm-svn: 141564
parent 42c0330a
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