Skip to content
Commit ddc0cb6d authored by Evan Cheng's avatar Evan Cheng
Browse files

On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr,

are more expensive than the non-flag setting variant. Teach thumb2 size
reduction pass to avoid generating them unless we are optimizing for size.

rdar://12892707

llvm-svn: 170728
parent 68a542ae
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment