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Commit ee843ef0 authored by Tim Northover's avatar Tim Northover
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ARM: implement MRS/MSR (banked reg) system instructions.

These are system-only instructions for CPUs with virtualization
extensions, allowing a hypervisor easy access to all of the various
different AArch32 registers.

rdar://problem/17861345

llvm-svn: 215700
parent ccc517c4
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