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Commit f4b1a5bd authored by Owen Anderson's avatar Owen Anderson
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When adding the carry bit to another value on X86, exploit the fact that the carry-materialization

(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.

llvm-svn: 114460
parent f7a8e93b
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