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Commit fdd0eb40 authored by Evan Cheng's avatar Evan Cheng
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With recent MC changes, RIP base register is explicitly modeled. Make sure we... 

With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.

llvm-svn: 76094
parent 4ded3d3d
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