the cmake build.

llvm-svn: 75246

tomorrow.

llvm-svn: 75245

elimiantes the last use of GVRequiresExtraLoad, so delete it.

llvm-svn: 75244

need for other purposes.

llvm-svn: 75243

done in ClassifyGlobalReference instead of reconstructing the info
awkwardly.

llvm-svn: 75240

PIC-base to be added in.

llvm-svn: 75238

is just a trivial wrapper around "ClassifyGlobalReference", which
stole a ton of logic from LowerGlobalAddress.

llvm-svn: 75237

llvm-svn: 75236

to use isGlobalStubReference instead of GVRequiresExtraLoad
(which should really be part of isel).

llvm-svn: 75234

MachineOperand is a reference to a stub, not a reference to the
global variable itself.  Look no context needed!

llvm-svn: 75233

llvm-svn: 75232

more complex and slow than just directly testing what we care about.

llvm-svn: 75231

split its handling out to PCRelGVRequiresExtraLoad, and simplify code
based on this.

llvm-svn: 75230

llvm-svn: 75229

llvm-svn: 75228

template.  Also convert it to take a MachineOperand instead of a GV*

llvm-svn: 75227

llvm-svn: 75220

We don't need separate thumb1 instructions tADDSi3 etc. for addc and subc. The "normal" version always modify condition register CPSR so we should just use def : pat to match to the same instructions.

llvm-svn: 75219

llvm-svn: 75218

llvm-svn: 75217

llvm-svn: 75212

llvm-svn: 75206

Use getAsmName() method instead of accessing AsmName field directly.

llvm-svn: 75205

This is part of the fix for pr4521.

llvm-svn: 75201

llvm-svn: 75198

llvm-svn: 75192

Initial support for load / store multiple opt pass Thumb2 support (post-allocation only). It's kind of there, but not quite. I'll return to this later.

llvm-svn: 75190

llvm-svn: 75188

llvm-svn: 75187

is modified. Otherwise, the unwinder will get confused. The old code (before I
started my hacking) did this. It dropped on the floor, because I wasn't aware of
this requirement.

On the plus side, if we use "alloca" in a function, we create frame pointers
even with -fomit-frame-pointer is enabled!

This is a Good Thing(tm)!!!

llvm-svn: 75183

Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. Also change the printer to make the scale 4 explicit.

Note, we are not yet generating these instructions.

llvm-svn: 75181

llvm-svn: 75173

llvm-svn: 75172

llvm-svn: 75170

gcc.apple/asm-block-13.c
gcc.apple/asm-block-57.c

llvm-svn: 75169

llvm-svn: 75158

llvm-svn: 75153

llvm-svn: 75142

llvm-svn: 75118

isel.

llvm-svn: 75117