register is not killed in the loop.

This fixes 188.ammp on ARM where the post-ra scheduler would grab a register
that looked available but wasn't.

A testcase would be huge and fragile, sorry.

llvm-svn: 101930

transform the Opcode to the corresponding t2LDR*pci counterpart.

Ref: A8.6.86 LDRT, A8.6.65 LDRBT, A8.6.77 LDRHT, A8.6.81 LDRSBT, A8.6.85 LDRSHT
llvm-svn: 101915

llvm-svn: 101914

into SelectionDAGBuilder. This avoids a separate pass over the
instructions, and has the side effect of providing debug location
information to the copy.

llvm-svn: 101906

they end up doing nothing.

llvm-svn: 101904

llvm-svn: 101902

llvm-svn: 101901

llvm-svn: 101900

llvm-svn: 101899

llvm-svn: 101897

in other types.  fix this by only bumping zero-byte globals
up to a single byte if the *entire global* is zero size,
fixing PR6340.

This also fixes empty arrays etc to be handled correctly,
and only does this on subsection-via-symbols targets (aka
darwin) which is the only place where this matters.

llvm-svn: 101879

patch by Kalle Raiskila!

llvm-svn: 101875

loop unswitch, and use inst simplify instead.  It is more
powerful and less duplication.

llvm-svn: 101874

inst simplify.  No functionality change.

llvm-svn: 101873

condition we're unswitching on.  In this case, don't try to
simplify the second copy of the loop which may be dead or not,
but is probably a constant now.  This fixes PR6879

llvm-svn: 101870

now that the testsuite has been updated.

llvm-svn: 101866

llvm-svn: 101860

it as it's not dead.

llvm-svn: 101855

an optimizer infinite loop on the file, PR6866.

llvm-svn: 101854

d==15 is considered illegal.  Return false instead of assert().

llvm-svn: 101852

shifts and null vectors. Autoupgrade these to what we'd lower them to.

Add a testcase to exercise this.

llvm-svn: 101851

in the case where a basic block is split.

llvm-svn: 101850

SelectionDAGBuilder, where it doesn't have to be as complicated.

llvm-svn: 101848

references to it.

llvm-svn: 101847

llvm-svn: 101846

Arg promotion was deleting call graph nodes that still had references
from the 'indirect' CGN.  Like the inliner, it should only delete the
function if all references are gone.

llvm-svn: 101845

responsible for figuring out what that's supposed to be on its own.

llvm-svn: 101844

where multiple blocks are emitted; functions which do this need to return
the new BB so that their callers can stay current.

llvm-svn: 101843

llvm-svn: 101839

llvm-svn: 101832

and End arguments by-value rather than by-reference.

llvm-svn: 101830

llvm-svn: 101827

an argument to things that need it.

llvm-svn: 101825

llvm-svn: 101824

need it, just pass around the parent block of the current instruction
explicitly.

llvm-svn: 101822

just ask ScalarEvolution for it on demand. This helps IVUsers be more robust
in the case of expressions changing underneath it. This fixes PR6862.

llvm-svn: 101819

Pseudocode details of conditional, Condition bits '111x' indicate the
instruction is always executed.  That is, '1111' is a leagl condition field
value, which is now mapped to ARMCC::AL.

Also add a test case for condition field '1111'.

llvm-svn: 101817

llvm-svn: 101812

llvm-svn: 101808

fetch one from the MachineFunction.

llvm-svn: 101807