llvm-svn: 114304

llvm-svn: 114303

llvm-svn: 114297

Patch by Che-Liang Chiou <clchiou@gmail.com>!

llvm-svn: 114294

llvm-svn: 114292

llvm-svn: 114263

thumb with floating point.

llvm-svn: 114256

llvm-svn: 114254

instructions (PICADD, PICLDR, et.al.)

llvm-svn: 114243

with one in the generic printing code is an error.

llvm-svn: 114242

llvm-svn: 114240

llvm-svn: 114237

value should be in GPRs when it's going to be used as a scalar, and we use
VMOVRRD to make that happen, but if the value is converted back to a vector
we need to fold to a simple bit_convert.  Radar 8407927.

llvm-svn: 114233

and shift instructions on ARM. Update the tests to match.

llvm-svn: 114230

llvm-svn: 114226

llvm-svn: 114215

llvm-svn: 114212

This fixes rdar://8396318.

llvm-svn: 114201

llvm-svn: 114195

instruction lowering.

llvm-svn: 114191

What a weird instruction.

llvm-svn: 114190

llvm-svn: 114183

llvm-svn: 114173

llvm-svn: 114116

(PICLDRB, et. al.) and PICSTR*

llvm-svn: 114098

from the APFloat.

llvm-svn: 114096

This cleans up after the mess r108567 left in the CellSPU backend.
ORCvt-instruction were used to reinterpret registers, and the ORs were then
removed by isMoveInstr(). This patch now removes 350 instrucions of format:
	or $3, $3, $3
(from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is
checked for.

Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain.

llvm-svn: 114074

used for anything.

llvm-svn: 114067

instead of using default predicates on the expanded instructions.

llvm-svn: 114066

unnecessary dtor for MCOperand.

llvm-svn: 114064

llvm-svn: 114048

register allocation to VLDMD and VSTMD respectively.  This avoids using the
dregpair operand modifier.

llvm-svn: 114047

llvm-svn: 114030

llvm-svn: 114026

llvm-svn: 114025

moves. Previously, the immediate was printed as the encoded integer value,
which is incorrect.

llvm-svn: 114021

functions in ARMBaseInfo.h so it can be used in the MC library as well.
For anything bigger than this, we may want a means to have a small support
library for shared helper functions like this. Cross that bridge when we
come to it.

llvm-svn: 114016

merge the common cases.

llvm-svn: 114013

if the register is a member of the SPR register class directly instead.

llvm-svn: 114012

llvm-svn: 114009