llvm-svn: 78330

Add parameter to pattern classes to enable an itinerary to be specified for instructions. For now just use the existing itineraries or NoItinerary.

llvm-svn: 78321

creation activity into the target-specific subclasses of TLOF.
Before this, globals with explicit sections could be created by
the base class.

1. make getOrCreateSection protected, add a new getExplicitSectionGlobal
   pure virtual method to assign sections to globals with a specified
   section.
2. eliminate getSpecialCasedSectionGlobals, which is now PIC specific.
3. eliminate the getKindForNamedSection virtual method, which is
   now just a static method for ELF.
4. Add implementions of getExplicitSectionGlobal for ELF/PECOFF/Darwin/PIC16.
   They are now all detangled and understandable, woo! :)

llvm-svn: 78319

creating them directly in the pic16 asmprinter.

llvm-svn: 78317

llvm-svn: 78299

by aggressive chain operand optimization. UpdateNodeOperands
does not modify the node in place if it would result in
a node identical to an existing node.

llvm-svn: 78297

llvm-svn: 78293

These operations will have to be synthesized from other instructions.

llvm-svn: 78263

that have that constraint.  This is currently just assigning a fixed set of
registers, and it only handles VLDn for n=2,3,4 with DPR registers.
I'm going to expand it to handle more operations next; we can make it smarter
once everything is working correctly.

llvm-svn: 78256

subtle bug with small code model.

llvm-svn: 78255

is a subset of the other, but both are subsets of GR32.

llvm-svn: 78250

When using NEON for single-precision FP, the NEON result must be placed in D0-D15 as these are the only D registers with S subregs. Introduce a new regclass to represent D0-D15 and use it in the NEON single-precision FP patterns.

llvm-svn: 78244

llvm-svn: 78242

hardfloat case.

llvm-svn: 78237

a superset relation. This code wants to test the regular superset
relation.

llvm-svn: 78236

llvm-svn: 78232

Patch by Sandeep Patel!

llvm-svn: 78225

llvm-svn: 78220

llvm-svn: 78219

PR4572. A few tests have some minor code regressions due to different
coalescing.

llvm-svn: 78217

llvm-svn: 78216

llvm-svn: 78212

llvm-svn: 78211

llvm-svn: 78209

llvm-svn: 78207

Patch by Neale Ferguson!

llvm-svn: 78203

llvm-svn: 78200

llvm-svn: 78191

llvm-svn: 78189

llvm-svn: 78182

llvm-svn: 78181

Patch by Sandeep Patel

llvm-svn: 78180

a dirty hack and isn't need anymore since the last x86 code emitter patch)
- Add a target-dependent modifier to addend calculation
- Use R_X86_64_32S relocation for X86::reloc_absolute_word_sext
- Use getELFSectionFlags whenever possible
- fix getTextSection to use TLOF and emit the right text section 
- Handle global emission for static ctors, dtors and Type::PointerTyID
- Some minor fixes

llvm-svn: 78176

llvm-svn: 78175

MMX arguments. This fixes PR4684.

llvm-svn: 78163

them in the verifier.

llvm-svn: 78160

getKindForGlobal.

llvm-svn: 78156

llvm-svn: 78146

Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.

llvm-svn: 78142

llvm-svn: 78138