- Jul 26, 2010
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Dan Gohman authored
dependence on DominanceFrontier. Instead, add an explicit DominanceFrontier pass in StandardPasses.h to ensure that it gets scheduled at the right time. Declare that loop unrolling preserves ScalarEvolution, and shuffle some getAnalysisUsages. This eliminates one LoopSimplify and one LCCSA run in the standard compile opts sequence. llvm-svn: 109413
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Dan Gohman authored
llvm-svn: 109412
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Dan Gohman authored
don't visit all blocks in the function, and don't iterate over the split blocks' predecessor lists for each block visited. Also, remove the special-case test for the entry block. Splitting the entry block isn't common enough to make this worthwhile. This fixes a major compile-time bottleneck which is exposed now that LoopSimplify isn't being redundantly run both before and after DominanceFrontier. llvm-svn: 109408
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Dan Gohman authored
llvm-svn: 109405
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Dan Gohman authored
llvm-svn: 109404
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Dan Gohman authored
llvm-svn: 109403
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Dan Gohman authored
llvm-svn: 109402
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Dan Gohman authored
explicit inequality check. llvm-svn: 109401
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Dan Gohman authored
llvm-svn: 109400
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Dan Gohman authored
explicit inequality check. llvm-svn: 109398
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Duncan Sands authored
may be used uninitialized in the callers of HighRegPressure. llvm-svn: 109393
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Douglas Gregor authored
llvm-svn: 109391
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Michael J. Spencer authored
A Visual C++ extension that removes trailing new lines? Seriously? llvm-svn: 109390
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Michael J. Spencer authored
Origonal Windows COFF implementation by Nathan Jedffords. llvm-svn: 109389
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Lang Hames authored
llvm-svn: 109388
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Benjamin Kramer authored
llvm-svn: 109386
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- Jul 25, 2010
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Evan Cheng authored
llvm-svn: 109383
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Douglas Gregor authored
llvm-svn: 109373
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Douglas Gregor authored
llvm-svn: 109372
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Bob Wilson authored
those. Radar 8231572. llvm-svn: 109367
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Eli Friedman authored
invalid type. llvm-svn: 109365
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Eli Friedman authored
llvm-svn: 109362
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Eli Friedman authored
llvm-svn: 109361
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Eli Friedman authored
this consistently. llvm-svn: 109360
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- Jul 24, 2010
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Anton Korobeynikov authored
llvm-svn: 109359
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Nick Lewycky authored
build of llvm-gcc. llvm-svn: 109355
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Anton Korobeynikov authored
llvm-svn: 109354
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Nick Lewycky authored
it needs to be mapped to refer to the function in the new module, not the old one. Fixes PR7700. llvm-svn: 109353
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Duncan Sands authored
hanging off a value, then the dropping code will intentionally not drop it too (since this is almost certainly a bug). llvm-svn: 109337
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Bob Wilson authored
instead of fixed size arrays, so that increasing FirstVirtualRegister to 16K won't cause a compile time performance regression. llvm-svn: 109330
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Devang Patel authored
Use current working directory when Dirname is empty. This only happens when absolute source file path is used on compiler command line. llvm-svn: 109302
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Evan Cheng authored
appropriate for targets without detailed instruction iterineries. The scheduler schedules for increased instruction level parallelism in low register pressure situation; it schedules to reduce register pressure when the register pressure becomes high. On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2 by 16%. llvm-svn: 109300
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Bruno Cardoso Lopes authored
llvm-svn: 109295
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Jim Grosbach authored
function live in set. This will give us tGPR for Thumb1 and GPR otherwise, so the copy will be spillable. rdar://8224931 llvm-svn: 109293
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Jim Grosbach authored
to be of a different register class. For example, in Thumb1 if the live-in is a high register, we want the vreg to be a low register. rdar://8224931 llvm-svn: 109291
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Devang Patel authored
llvm-svn: 109285
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Dale Johannesen authored
comments explaining why it was wrong. 8225024. Fix the real problem in 8213383: the code that splits very large blocks when no other place to put constants can be found was not considering the case that the block contained a Thumb tablejump. llvm-svn: 109282
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Evan Cheng authored
it's too late to start backing off aggressive latency scheduling when most of the registers are in use so the threshold should be a bit tighter. - Correctly handle live out's and extract_subreg etc. - Enable register pressure aware scheduling by default for hybrid scheduler. For ARM, this is almost always a win on # of instructions. It's runtime neutral for most of the tests. But for some kernels with high register pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by 54 and sped up by 20%. llvm-svn: 109279
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Bruno Cardoso Lopes authored
llvm-svn: 109276
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- Jul 23, 2010
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Dan Gohman authored
eliminate it. llvm-svn: 109270
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