- Mar 09, 2012
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Kevin Enderby authored
prefix. Added a FIXME to remind us this still does not work when it is not the first prefix. llvm-svn: 152414
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Daniel Dunbar authored
names. llvm-svn: 152413
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NAKAMURA Takumi authored
~0U might be i32 on 32-bit hosts, then (uint64_t)~0U might not be expected as (i64)0xFFFFFFFF_FFFFFFFF, but as (i64)0x00000000_FFFFFFFF. llvm-svn: 152407
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NAKAMURA Takumi authored
llvm-svn: 152406
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Duncan Sands authored
negative switch cases if the branch condition is known to be positive. Inspired by a recent improvement to GCC's VRP. llvm-svn: 152405
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Anton Korobeynikov authored
Patch by Tom Stellard! llvm-svn: 152400
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Nick Lewycky authored
it to analyze extractvalue(llvm.[us](add|sub).with.overflow.*) intrinsics! llvm-svn: 152398
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Gregory Szorc authored
This contains a semi-functional skeleton for the implementation of the LLVM bindings for Python. The API for the Object.h interface is roughly designed but not implemented. MemoryBufferRef is implemented and actually appears to work! The ObjectFile unit test fails with a segmentation fault because the LLVM library isn't being properly initialized. The build system doesn't know about this code yet, so no alerts should fire. llvm-svn: 152397
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Andrew Trick authored
llvm-svn: 152393
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Craig Topper authored
llvm-svn: 152391
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Ahmed Charles authored
llvm-svn: 152390
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Andrew Trick authored
llvm-svn: 152382
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Andrew Trick authored
llvm-svn: 152374
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Andrew Trick authored
llvm-svn: 152373
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Chandler Carruth authored
caused several clients to select the slow variation. =[ This is extra annoying because we don't have any realistic way of testing this -- by design, these two functions *must* compute the same value. Found while inspecting the output of some benchmarks I'm working on. llvm-svn: 152369
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Chandler Carruth authored
introduced. Specifically, there are cost reductions for all constant-operand icmp instructions against an alloca, regardless of whether the alloca will in fact be elligible for SROA. That means we don't want to abort the icmp reduction computation when we abort the SROA reduction computation. That in turn frees us from the need to keep a separate worklist and defer the ICmp calculations. Use this new-found freedom and some judicious function boundaries to factor the innards of computing the cost factor of any given instruction out of the loop over the instructions and into static helper functions. This greatly simplifies the code, and hopefully makes it more clear what is happening here. Reviewed by Eric Christopher. There is some concern that we'd like to ensure this doesn't get out of hand, and I plan to benchmark the effects of this change over the next few days along with some further fixes to the inline cost. llvm-svn: 152368
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Chad Rosier authored
Original commit message from r147481: DAGCombine for transforming 128->256 casts into a vmovaps, rather then a vxorps + vinsertf128 pair if the original vector came from a load. Fix: Unaligned loads need to generate a vmovups. rdar://10974078 llvm-svn: 152366
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Andrew Trick authored
llvm-svn: 152360
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Andrew Trick authored
llvm-svn: 152359
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Evan Cheng authored
llvm-svn: 152356
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- Mar 08, 2012
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Benjamin Kramer authored
llvm-svn: 152346
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Benjamin Kramer authored
The test fell back to the C backend, making it useless and it started to fail on configurations that don't build the C backend. llvm-svn: 152342
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Duncan Sands authored
Patch by jey. llvm-svn: 152315
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Duncan Sands authored
buildbots. Original commit message: [ADT] Change the trivial FoldingSetNodeID::Add* methods to be inline, reapplied with a fix for the longstanding over-read of 32-bit pointer values. llvm-svn: 152304
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Craig Topper authored
llvm-svn: 152301
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Daniel Dunbar authored
with a fix for the longstanding over-read of 32-bit pointer values. llvm-svn: 152300
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Stepan Dyatkovskiy authored
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20120130/136146.html Implemented CaseIterator and it solves almost all described issues: we don't need to mix operand/case/successor indexing anymore. Base iterator class is implemented as a template since it may be initialized either from "const SwitchInst*" or from "SwitchInst*". ConstCaseIt is just a read-only iterator. CaseIt is read-write iterator; it allows to change case successor and case value. Usage of iterator allows totally remove resolveXXXX methods. All indexing convertions done automatically inside the iterator's getters. Main way of iterator usage looks like this: SwitchInst *SI = ... // intialize it somehow for (SwitchInst::CaseIt i = SI->caseBegin(), e = SI->caseEnd(); i != e; ++i) { BasicBlock *BB = i.getCaseSuccessor(); ConstantInt *V = i.getCaseValue(); // Do something. } If you want to convert case number to TerminatorInst successor index, just use getSuccessorIndex iterator's method. If you want initialize iterator from TerminatorInst successor index, use CaseIt::fromSuccessorIndex(...) method. There are also related changes in llvm-clients: klee and clang. llvm-svn: 152297
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Craig Topper authored
Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. llvm-svn: 152296
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Daniel Dunbar authored
inline.", which is breaking the bots in a way I don't understand. llvm-svn: 152295
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Akira Hatanaka authored
llvm-svn: 152292
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Akira Hatanaka authored
llvm-svn: 152290
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Daniel Dunbar authored
llvm-svn: 152288
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Akira Hatanaka authored
For example, this pattern (select (setcc lhs, rhs, cc), true, 0) is transformed to this one: (select (setcc lhs, rhs, inverse(cc)), 0, true) This enables MipsDAGToDAGISel::ReplaceUsesWithZeroReg (added in r152280) to replace 0 with $zero. llvm-svn: 152285
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Chandler Carruth authored
analysis to be methods on the cost analysis's function info object instead of the code metrics object. These really are just users of the code metrics, they're building the information for the function's analysis. This is the first step of growing the amount of information we collect about a function in order to cope with pair-wise simplifications due to allocas. llvm-svn: 152283
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Akira Hatanaka authored
llvm-svn: 152282
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Akira Hatanaka authored
For example, the first instruction in the code below can be eliminated if the use of $vr0 is replaced with $zero: addiu $vr0, $zero, 0 add $vr2, $vr1, $vr0 add $vr2, $vr1, $zero llvm-svn: 152280
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Andrew Trick authored
Allow targets to provide their own schedulers (subclass of ScheduleDAGInstrs) to the misched pass. Select schedulers using -misched=... llvm-svn: 152278
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Jim Grosbach authored
The ARM code generator makes aggressive assumptions about the encodings being selected for branches which MCRelaxAll invalidates. rdar://11006355 llvm-svn: 152268
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Sean Callanan authored
code that will be relocated into another memory space. Now when relocations are resolved, the address of the relocation in the host memory (where the JIT is) is passed separately from the address that the relocation will be at in the target memory (where the code will run). llvm-svn: 152264
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Andrew Trick authored
llvm-svn: 152262
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