Commits · 020d104496ff4dc03b95fd35e4d51d66e0a542d8 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Oct 17, 2016
- GlobalISel: support wider range of load/store sizes in AArch64. · 020d1044
  Tim Northover authored Oct 17, 2016
  020d1044
- AMDGPU/SI: Fix LowerParameter() for i16 arguments · bc6c523c
  Tom Stellard authored Oct 17, 2016
  bc6c523c
- [DAG] optimize away an arithmetic-right-shift of a 0 or -1 value · 2cf6bfaf
  Sanjay Patel authored Oct 17, 2016
  2cf6bfaf
- [x86] add tests to show missing DAG folds for arithmetic-shift-right · 95db7579
  Sanjay Patel authored Oct 17, 2016
  95db7579
- [x86] auto-generate checks · 83296211
  Sanjay Patel authored Oct 17, 2016
  83296211
- [SDAG] Use ABI type alignment for constant pools when optimizing for size · aa79b19a
  James Molloy authored Oct 17, 2016
  aa79b19a
- [AVX-512] Add shuffle combining support for vpermi2var shuffles derived from... · 5b24cd31
  Craig Topper authored Oct 17, 2016
  5b24cd31
- [AVX-512] Add vpermi2var test cases to shuffle combining test case. Combining... · 20523187
  Craig Topper authored Oct 17, 2016
  20523187
- [AVX-512] Add support for turning a 256-bit load that goes to both halfs of an... · 715ad7fe
  Craig Topper authored Oct 16, 2016
  715ad7fe
Oct 16, 2016
- [AVX-512] Fix the operand order for vpermi2var_qi intrinsics to match the... · aa1370ac
  Craig Topper authored Oct 16, 2016
  aa1370ac
- [AVX-512] Correct execution domain for VPERMT2PS and VPERMI2PS. · 4729fe8b
  Craig Topper authored Oct 16, 2016
  4729fe8b
Oct 15, 2016
- [X86][SSE] Added some basic examples of knownbits failing for vector types · 730f83a7
  Simon Pilgrim authored Oct 15, 2016
  730f83a7
- [X86] Regenerate known bits test · d654530e
  Simon Pilgrim authored Oct 15, 2016
  d654530e
- [AVX-512] Add shuffle comments for vbroadcast instructions. · dde865af
  Craig Topper authored Oct 15, 2016
  dde865af
- AMDGPU/SI: Handle s_getreg hazard in GCNHazardRecognizer · 961811c9
  Tom Stellard authored Oct 15, 2016
  961811c9
- GlobalISel: rename legalizer components to match others. · 69fa84a6
  Tim Northover authored Oct 14, 2016
  69fa84a6
Oct 14, 2016
- PowerPC: specify full triple to avoid different Darwin asm syntax. · 22bff66a
  Tim Northover authored Oct 14, 2016
  22bff66a
- [ARM] add tests for PR30660 · 8f5bdb9d
  Sanjay Patel authored Oct 14, 2016
  8f5bdb9d
- [PowerPC] add tests for PR30661 · 928f3d73
  Sanjay Patel authored Oct 14, 2016
  928f3d73
- [PPC] Shorter sequence to load 64bit constant with same hi/lo words · 0cd65429
  Guozhi Wei authored Oct 14, 2016
  0cd65429
- AMDGPU/SI: Use new SimplifyDemandedBits helper for multi-use operations · 09c2bd6b
  Tom Stellard authored Oct 14, 2016
  09c2bd6b
- Add a pass to optimize patterns of vectorized interleaved memory accesses for · 01a057a0
  David L Kreitzer authored Oct 14, 2016
  01a057a0
- AMDGPU/SI: Don't allow unaligned scratch access · 64a9d087
  Tom Stellard authored Oct 14, 2016
  64a9d087
- [X86] Take advantage of the lzcnt instruction on btver2 architectures when... · b6d652ad
  Pierre Gousseau authored Oct 14, 2016
  b6d652ad
- [DAG] add folds for negated shifted sign bit · 00fc7a61
  Sanjay Patel authored Oct 14, 2016
  00fc7a61
- [x86] add tests to show missing folds for negated shifted sign bit · 7b4e4afb
  Sanjay Patel authored Oct 14, 2016
  7b4e4afb
- AMDGPU: Select 64-bit {ADD,SUB}{C,E} nodes · 67624af0
  Nicolai Haehnle authored Oct 14, 2016
  67624af0
- [GlobalISel] Get the AArch64 tests to work on Linux · 68c7b04e
  Diana Picus authored Oct 14, 2016
  68c7b04e
- [DAGCombiner] Teach createBuildVecShuffle to handle cases where input vectors... · 40feb7f1
  Craig Topper authored Oct 14, 2016
  40feb7f1
- [AMDGPU] Emit 32-bit lo/hi got and pc relative variant kinds for external and... · c96b5d70
  Konstantin Zhuravlyov authored Oct 14, 2016
  c96b5d70
- CodeGen: use MSVC division on windows itanium · 7705c4f1
  Saleem Abdulrasool authored Oct 13, 2016
  7705c4f1
- CodeGen: adjust floating point operations in Windows itanium · 06383dd2
  Saleem Abdulrasool authored Oct 13, 2016
  06383dd2
Oct 13, 2016
- New llc option pie-copy-relocations to optimize access to extern globals. · f29fa586
  Sriraman Tallam authored Oct 13, 2016
  f29fa586
- Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." · a81682aa
  Nirav Dave authored Oct 13, 2016
  a81682aa
- In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled. · 4b369572
  Nirav Dave authored Oct 13, 2016
  4b369572
- [X86][AVX512] Fix sext v32i1 -> v32i8 lowering. · 8409c356
  Igor Breger authored Oct 13, 2016
  8409c356
- Fix for PR30687. Avoid dereferencing MBB.end(). · 468e793f
  Reid Kleckner authored Oct 13, 2016
  468e793f
- [ARM]: Assign cost of scaling used in addressing mode for ARM cores · 85874a93
  Javed Absar authored Oct 13, 2016
  85874a93
- [x86] add negate-i1 run for 32-bit target · 24b6ef77
  Sanjay Patel authored Oct 13, 2016
  24b6ef77
- [DAGCombiner] Add vector support to (mul (shl X, Y), Z) -> (shl (mul X, Z), Y) style combines · cb59b525
  Simon Pilgrim authored Oct 13, 2016
  cb59b525