"llvm/git@repo.hca.bsc.es:lalbano/llvm-bpevl.git" did not exist on "016547d2267b03f95d855b8ef5496eff69d5272c"
- Feb 10, 2012
-
-
Jakob Stoklund Olesen authored
It can be necessary to detach a register mask pointer from its MachineOperand. This method is convenient for checking clobbered physregs on a detached bitmask pointer. llvm-svn: 150261
-
Jakob Stoklund Olesen authored
This makes global live range splitting behave identically with and without register mask operands. This is not necessarily the best way of using register masks for live range splitting. It would be more efficient to first split global live ranges around calls (i.e., register masks), and reserve the fine grained per-physreg interference guidance for global live ranges that do not cross calls. For now the goal is to produce identical assembly when enabling register masks. llvm-svn: 150259
-
- Jan 13, 2012
-
-
Andrew Trick authored
llvm-svn: 148143
-
Andrew Trick authored
llvm-svn: 148103
-
- Jul 23, 2011
-
-
Jakob Stoklund Olesen authored
They always report 'no interference'. llvm-svn: 135843
-
- Jul 14, 2011
-
-
Jakob Stoklund Olesen authored
Original commit message: Count references to interference cache entries. Each InterferenceCache::Cursor instance references a cache entry. A non-zero reference count guarantees that the entry won't be reused for a new register. This makes it possible to have multiple live cursors examining interference for different physregs. The total number of live cursors into a cache must be kept below InterferenceCache::getMaxCursors(). Code generation should be unaffected by this change, and it doesn't seem to affect the cache replacement strategy either. llvm-svn: 135130
-
Jakob Stoklund Olesen authored
llvm-svn: 135122
-
Jakob Stoklund Olesen authored
Each InterferenceCache::Cursor instance references a cache entry. A non-zero reference count guarantees that the entry won't be reused for a new register. This makes it possible to have multiple live cursors examining interference for different physregs. The total number of live cursors into a cache must be kept below InterferenceCache::getMaxCursors(). Code generation should be unaffected by this change, and it doesn't seem to affect the cache replacement strategy either. llvm-svn: 135121
-
- Apr 09, 2011
-
-
Jakob Stoklund Olesen authored
This doesn't require seeking in the live interval union, so it is very cheap. llvm-svn: 129187
-
- Apr 07, 2011
-
-
Jakob Stoklund Olesen authored
llvm-svn: 129081
-
- Apr 02, 2011
-
-
Jakob Stoklund Olesen authored
When the greedy register allocator is splitting multiple global live ranges, it tends to look at the same interference data many times. The InterferenceCache class caches queries for unaltered LiveIntervalUnions. llvm-svn: 128764
-