* Fixed file headers to be consistent with the rest of LLVM
* Other minor fixes

llvm-svn: 3277

llvm-svn: 3275

llvm-svn: 3271

- Cleaned up the interface to AnalysisUsage to take analysis class names
   instead of ::ID's.
 - Pass::getAnalysis<> now no longer takes an optional argument

llvm-svn: 3265

   instead of ::ID's.
 - Pass::getAnalysis<> now no longer takes an optional argument

llvm-svn: 3264

Fix 2 bugs in FoldGetElemChain so index vector is not modified
when no GEPs are folded in, and so a hasLeadingZero is computed
only for the last folded GEP, not the one after that if any.

llvm-svn: 3244

  is platform independant afterall.
* Object orientize the functions, cleanup code a bit.  Instead of static
  global functions, the helpers for instruction selection are now part of
  the InstructionSelection Pass class.

llvm-svn: 3147

llvm-svn: 3143

llvm-svn: 3094

llvm-svn: 3090

llvm-svn: 3075

llvm-svn: 3058

llvm-svn: 3057

llvm-svn: 3056

llvm-svn: 2993

llvm-svn: 2985

llvm-svn: 2974

llvm-svn: 2942

llvm-svn: 2922

llvm-svn: 2911

llvm-svn: 2875

llvm-svn: 2861

Represent previous bools and these ones with flags in a single byte
per operand.

llvm-svn: 2860

llvm-svn: 2847

handle conditional move instructions:
-- cpMem<->Reg functions now support CC registers (int and FP) correctly.
-- Scratch registers must be explicitly provided to cpMem<->Reg when
   needed, since CC regs need one to be copied to/from memory.
-- CC regs are saved to a scratch register instead of stack.
-- All regs used by a instruction are now recorded in MachineInstr::regsUsed,
   since regs used to save values *across* an instruction are not obvious
   either from the operands or from the LiveVar sets.
-- An (explicit or implicit) operand may now be both a def and a use.
   This is needed for conditional move operations.
   So an operand may need spill code both before and after the instruction.
-- class MachineCodeForBasicBlock is now an annotation on BasicBlock.

llvm-svn: 2833

because operands may be modified directly to set register.
Also, class MachineCodeForBasicBlock is now an annotation on BasicBlock.

llvm-svn: 2832

llvm-svn: 2831

llvm-svn: 2830

This class is now an annotation on BasicBlock.

llvm-svn: 2829

llvm-svn: 2828

Moved here from MachineInstr.cpp to make it an annotation on BasicBlock.

llvm-svn: 2827

so additional dep. edges have to be added.
This was needed to correctly handle conditional move instructions!
MachineCodeForBasicBlock is now an annotation on BasicBlock.
Renamed "earliestForNode" to "earliestReadyTimeForNode".

llvm-svn: 2826

llvm-svn: 2822

An (explicit or implicit) operand may now be both a def and a use.
Also add a set of regs used by each instruction.
dump() no longer takes an optional argument, which doesn't work in gdb.

llvm-svn: 2821

because operands may be modified directly to set register.

llvm-svn: 2820

llvm-svn: 2807

llvm-svn: 2791

For details, See: docs/2002-06-25-MegaPatchInfo.txt

llvm-svn: 2779

MEGAPATCH checkin.

For details, See: docs/2002-06-25-MegaPatchInfo.txt

llvm-svn: 2778

a vector.  This makes asserting on array bounds easier.

llvm-svn: 2731