llvm-svn: 192275

Replace a couple instructions with patterns referring to other instructions with same encoding and operands. Mark a couple other instructions as CodeGenOnly since we have FR and VR instructions and only one of them is needed by the assembler/disassembler.

llvm-svn: 192274

Use AVX512PIi8 for the alt forms of vcmp instructions. This adds the TB prefix and keeps the mnemonic from starting with an extra 'v'

llvm-svn: 192272

Mark some instructions as CodeGenOnly since they aren't needed by the assembler or disassembler. Disassembler already filtered them, but asm parser still had them in its tables.

llvm-svn: 192271

Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. This way the asm parser will pick the right one based on the mode. Instruction selection already did the right thing based on the pointer size.

llvm-svn: 192266

llvm-svn: 192265

llvm-svn: 192262

to use DIScopeRef.

A paired commit at clang is required due to changes to DIBuilder.

llvm-svn: 192256

typedef are updated to use DIScopeRef.

llvm-svn: 192254

is updated to use DITypeRef.

A paired commit at clang is required due to changes to DIBuilder.

llvm-svn: 192251

is updated to use DITypeRef.

A paired commit at clang is required due to changes to DIBuilder.

llvm-svn: 192246

reciprocal exponent, and reciprocal square root estimate instructions.

llvm-svn: 192242

Do what some other instructions do, and add an assert method.

llvm-svn: 192236

convert instructions.

llvm-svn: 192231

This fixes repeated -Wmicrosoft warnings when self-hosting clang on
Windows, and gets us real unsigned enum types with MSVC.

llvm-svn: 192227

llvm-svn: 192224

Mips16 will try and create a stub for it and this will
result in a link error because that function does not exist in libc.

llvm-svn: 192223

llvm-svn: 192218

llvm-svn: 192216

llvm-svn: 192215

llvm-svn: 192214

No intended functionality change.

llvm-svn: 192213

These are bugs to fix later.

llvm-svn: 192212

Sadly this loses the checking from AssertingVH, but apparently storing the
end() of a BasicBlock into an AssertingVH has bad consequences as it's not
really an instruction.

llvm-svn: 192209

have native instructions for this.

llvm-svn: 192207

llvm-svn: 192205

llvm-svn: 192199

Patch by Vladimir Voskresensky. The erros were:

Path.inc:274:3: error: ‘Dl_info’ was not declared in this scope
...

and

usr/include/spawn.h:52:14: error: expected ‘,’ or ‘...’ before ‘argv’

llvm-svn: 192185

Patch by Greg Bedwell.

llvm-svn: 192182

This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.

The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.

I will send an email to llvmdev with instructions on how to use this.

llvm-svn: 192181

llvm-svn: 192179

llvm-svn: 192178

No new testcases. However, this patch makes all supported JIT testcases in 
test/ExecutionEngine  pass on Sparc.

llvm-svn: 192176

Remove unneeded MMX instruction definition by moving pattern to an equivalent instruction definition and removing the filtering from the disassembler table building.

llvm-svn: 192175

llvm-svn: 192174

llvm-svn: 192173

Remove some instructions that existed to provide aliases to the assembler. Can be done with InstAlias instead. Unfortunately, this was causing printer to use 'vmovq' or 'vmovd' based on what was parsed. To cleanup the inconsistencies convert all 'vmovd' with 64-bit registers to 'vmovq', but provide an alias so that 'vmovd' will still parse.

llvm-svn: 192171

[Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead.

llvm-svn: 192160

llvm-svn: 192158

llvm-svn: 192157