- Sep 16, 2013
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Vladimir Medic authored
llvm-svn: 190780
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- Sep 15, 2013
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Reed Kotler authored
so it can be better used for general interoperability testing between mips32 and mips16. llvm-svn: 190762
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- Sep 14, 2013
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Zoran Jovanovic authored
llvm-svn: 190746
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Zoran Jovanovic authored
llvm-svn: 190745
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Zoran Jovanovic authored
llvm-svn: 190744
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- Sep 13, 2013
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Zoran Jovanovic authored
llvm-svn: 190676
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- Sep 12, 2013
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Joey Gouly authored
The 'Deprecated' class allows you to specify a SubtargetFeature that the instruction is deprecated on. The 'ComplexDeprecationPredicate' class allows you to define a custom predicate that is called to check for deprecation. For example: ComplexDeprecationPredicate<"MCR"> would mean you would have to define the following function: bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, std::string &Info) Which returns 'false' for not deprecated, and 'true' for deprecated and store the warning message in 'Info'. The MCTargetAsmParser constructor was chaned to take an extra argument of the MCInstrInfo class, so out-of-tree targets will need to be changed. llvm-svn: 190598
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- Sep 11, 2013
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Daniel Sanders authored
[mips][msa] Added support for matching mulv, nlzc, sll, sra, srl, and subv from normal IR (i.e. not intrinsics) llvm-svn: 190518
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Daniel Sanders authored
[mips][msa] Added support for matching fadd, fdiv, flog2, fmul, frint, fsqrt, and fsub from normal IR (i.e. not intrinsics) llvm-svn: 190512
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Daniel Sanders authored
llvm-svn: 190509
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Daniel Sanders authored
The corresponding intrinsic is now lowered into equivalent IR (ISD::ADD) before instruction selection. llvm-svn: 190507
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Daniel Sanders authored
No functional change llvm-svn: 190506
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Daniel Sanders authored
The elements of the operands should be half the width of the elements of the result. llvm-svn: 190505
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Eli Friedman authored
llvm-svn: 190448
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- Sep 10, 2013
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Daniel Sanders authored
The dotp_[su].b instructions never existed in any revision of the MSA spec. llvm-svn: 190398
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Vladimir Medic authored
Add test cases for Mips mthc1/mfhc1 instructions. Add check for odd value of register when PFU is 32 bit. llvm-svn: 190397
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Vladimir Medic authored
llvm-svn: 190396
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- Sep 09, 2013
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Akira Hatanaka authored
stores, make sure the load or store that accesses the higher half does not have an alignment that is larger than the offset from the original address. llvm-svn: 190318
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Bill Wendling authored
We used to generate the compact unwind encoding from the machine instructions. However, this had the problem that if the user used `-save-temps' or compiled their hand-written `.s' file (with CFI directives), we wouldn't generate the compact unwind encoding. Move the algorithm that generates the compact unwind encoding into the MCAsmBackend. This way we can generate the encoding whether the code is from a `.ll' or `.s' file. <rdar://problem/13623355> llvm-svn: 190290
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- Sep 07, 2013
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Akira Hatanaka authored
precision loads and stores as well as reg+imm double precision loads and stores. Previously, expansion of loads and stores was done after register allocation, but now it takes place during legalization. As a result, users will see double precision stores and loads being emitted to spill and restore 64-bit FP registers. llvm-svn: 190235
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Akira Hatanaka authored
llvm-svn: 190234
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Akira Hatanaka authored
llvm-svn: 190232
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Akira Hatanaka authored
into a 5-bit or 6-bit field. llvm-svn: 190226
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Akira Hatanaka authored
llvm-svn: 190224
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Akira Hatanaka authored
llvm-svn: 190221
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Akira Hatanaka authored
equivalent to "beq $zero, $zero, offset". llvm-svn: 190220
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Akira Hatanaka authored
llvm-svn: 190219
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- Sep 06, 2013
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Daniel Sanders authored
llvm-svn: 190156
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Daniel Sanders authored
Tested with 'llvm-tblgen -print-records' which outputs identical records before and after this patch. llvm-svn: 190155
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Vladimir Medic authored
This patch adds support for microMIPS Multiply and Add/Sub instructions. Test cases are included in patch. llvm-svn: 190154
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Daniel Sanders authored
Their default is to be the same as the result register set. No functional change llvm-svn: 190153
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Vladimir Medic authored
This patch adds support for microMIPS Move to/from HI/LO instructions. Test cases are included in patch. llvm-svn: 190152
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Daniel Sanders authored
Their default is to be the same as the result register set. No functional change llvm-svn: 190151
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Daniel Sanders authored
Their default is to be the same as the result register set. No functional change llvm-svn: 190150
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Vladimir Medic authored
This patch adds support for microMIPS Move Conditional instructions. Test cases are included in patch. llvm-svn: 190148
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Daniel Sanders authored
Their default is to be the same as the result register set. No functional change llvm-svn: 190146
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Daniel Sanders authored
Their default is to be the same as the result register set. No functional change llvm-svn: 190145
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Vladimir Medic authored
llvm-svn: 190144
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Daniel Sanders authored
Their default is to be the same as the result register set. No functional change llvm-svn: 190143
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Daniel Sanders authored
Their default is to be the same as the result register set. No functional change llvm-svn: 190142
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