from the simple isel to the pattern isel.  This forces inserted libcalls
to serialize against other function calls, which was breaking
UnitTests/2005-05-12-Int64ToFP.  Hopefully this will fix issues on other
targets as well.

llvm-svn: 21872

llvm-svn: 21871

llvm-svn: 21870

llvm-svn: 21868

should now pass (the "LLVM" and "REF" results should be identical)

llvm-svn: 21866

llvm-svn: 21862

llvm-svn: 21861

llvm-svn: 21859

llvm-svn: 21856

llvm-svn: 21855

llvm-svn: 21838

llvm-svn: 21833

llvm-svn: 21827

where they are directly supported by the architecture.  Wrap a bunch of
long lines :(

llvm-svn: 21826

llvm-svn: 21825

llvm-svn: 21824

arithmetic lowering.

llvm-svn: 21818

being stored/loaded through!

llvm-svn: 21806

llvm-svn: 21805

llvm-svn: 21804

llvm-svn: 21803

warning from the CBE+GCC.

llvm-svn: 21779

* Remove commented-out debug printouts

llvm-svn: 21707

Lower debug info to noops.

llvm-svn: 21698

llvm-svn: 21697

Proof?

ubyte %bar(ubyte %x) {
entry:
        %tmp.1 = call ubyte %llvm.ctlz( ubyte %x )
        ret ubyte %tmp.1
}

==>

zapnot $16,1,$0
CTLZ $0,$0
subq $0,56,$0
zapnot $0,1,$0
ret $31,($26),1

llvm-svn: 21691

population (ctpop).  Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.

More coming soon.

llvm-svn: 21676

llvm-svn: 21639

was contributed by Morten Ofstad, with some minor tweaks and bug fixes added
by me.

llvm-svn: 21636

llvm-svn: 21629

llvm-svn: 21606

llvm-svn: 21605

Implement Value* tracking for loads and stores in the selection DAG.  This enables one to use alias analysis in the backends.

(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*.  Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.

llvm-svn: 21599

llvm-svn: 21552

int foo1(int x, int y) {
  int t1 = x >= 0;
  int t2 = y >= 0;
  return t1 & t2;
}
int foo2(int x, int y) {
  int t1 = x == -1;
  int t2 = y == -1;
  return t1 & t2;
}

produces:

_foo1:
        or r2, r4, r3
        srwi r2, r2, 31
        xori r3, r2, 1
        blr
_foo2:
        and r2, r4, r3
        addic r2, r2, 1
        li r2, 0
        addze r3, r2
        blr

instead of:

_foo1:
        srwi r2, r4, 31
        xori r2, r2, 1
        srwi r3, r3, 31
        xori r3, r3, 1
        and r3, r2, r3
        blr
_foo2:
        addic r2, r4, 1
        li r2, 0
        addze r2, r2
        addic r3, r3, 1
        li r3, 0
        addze r3, r3
        and r3, r2, r3
        blr

llvm-svn: 21547

_foo:
        or r2, r4, r3
        srwi r3, r2, 31
        blr

instead of:

_foo:
        srwi r2, r4, 31
        srwi r3, r3, 31
        or r3, r2, r3
        blr

llvm-svn: 21544

llvm-svn: 21439

llvm-svn: 21420

bool %test(int %X) {
        %Y = and int %X, 8
        %Z = setne int %Y, 0
        ret bool %Z
}

we now generate this:

        rlwinm r2, r3, 0, 28, 28
        srwi r3, r2, 3

instead of this:

        rlwinm r2, r3, 0, 28, 28
        srwi r2, r2, 3
        rlwinm r3, r2, 0, 31, 31

I'll leave it to Nate to get it down to one instruction. :)

---------------------------------------------------------------------

llvm-svn: 21391

This turns this PPC code:

        rlwinm r2, r3, 0, 28, 28
        cmpwi cr7, r2, 8
        mfcr r2
        rlwinm r3, r2, 31, 31, 31

into this:

        rlwinm r2, r3, 0, 28, 28
        srwi r2, r2, 3
        rlwinm r3, r2, 0, 31, 31

Next up, nuking the extra and.

llvm-svn: 21390