for Darwin PPC, but it's not fully working yet.

llvm-svn: 44258

llvm-svn: 44240

llvm-svn: 44204

llvm-svn: 44183

llvm-svn: 44128

to all targets uses GOT-relative offsets for PIC (Alpha?)

llvm-svn: 44108

in favour of teaching CCAssignToStack that size 0 and/or align
0 means to use the ABI values.  This seems a neater solution.
It is safe since no legal value type has size 0.

llvm-svn: 44107

MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.

llvm-svn: 44104

llvm-svn: 44057

to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.

llvm-svn: 44056

llvm-svn: 44048

llvm-svn: 44045

adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...

llvm-svn: 44037

some regressions on ppc nightly tests.

llvm-svn: 44029

Fixed some AsmPrinter issues
Added GLOBAL_OFFSET_TABLE Node handle.

llvm-svn: 44024

Target maintainers: please check that the instructions for your target are correctly marked.

llvm-svn: 44012

llvm-svn: 43998

This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,

llvm-svn: 43997

dealing with types whose size & alignment are
different on different subtargets.  Use it for x86 f80.

llvm-svn: 43988

llvm-svn: 43978

llvm-svn: 43955

llvm-svn: 43954

llvm-svn: 43950

Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

llvm-svn: 43924

llvm-svn: 43918

llvm-svn: 43892

Would somebody not on Darwin please make sure this
doesn't break anything.  Exception handling failures
would be the most likely symptom.

llvm-svn: 43844

Much improvement in exception handling.

llvm-svn: 43794

llvm-svn: 43749

Thanks for the suggestions Bill :-)

llvm-svn: 43742

static __thread struct {
    int a;
    int b;
} teste = {0, 0};

llvm-svn: 43722

less than 16. This is a temporary solution until dynamic stack alignment is
implemented.

llvm-svn: 43703

Removed all macro code for PIC (goodbye "la").
Support tested with shootout bench.

llvm-svn: 43697

should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.

llvm-svn: 43688

Evan, please review this.

llvm-svn: 43680

llvm-svn: 43676

regs on x86-64.

llvm-svn: 43669

llvm-svn: 43646

llvm-svn: 43642

llvm-svn: 43630