llvm-svn: 112921

llvm-svn: 112920

llvm-svn: 112919

stores.

llvm-svn: 112912

Patch by Cameron Esfahani!

llvm-svn: 112902

llvm-svn: 112896

llvm-svn: 112885

large local stack areas or require dynamic stack realignment, allocate a
base register via which to access the local frame. This allows efficient
access to frame indices not accessible via the FP (either due to being out
of range or due to dynamic realignment) or the SP (due to variable sized
object allocation). In particular, this greatly improves efficiency of access
to spill slots in Thumb functions which contain VLAs.

rdar://7352504
rdar://8374540
rdar://8355680

llvm-svn: 112883

Patch by Jan Sjodin!

llvm-svn: 112875

Move decoding of insertps back to avoid unused warnings in x86 isel lowering, and fix movlhps/movhlps to decode 4 elements shuffles

llvm-svn: 112869

there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.

This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.

llvm-svn: 112861

llvm-svn: 112852

llvm-svn: 112847

Move x86 specific shuffle mask decoding to its own header, it's also going to be used elsewhere. Also trim trailing whitespaces

llvm-svn: 112846

llvm-svn: 112842

ARM register class allocation order functions to take advantage of that.

llvm-svn: 112841

llvm-svn: 112828

llvm-svn: 112826

after regalloc.

llvm-svn: 112825

llvm-svn: 112806

llvm-svn: 112805

llvm-svn: 112804

llvm-svn: 112799

I don't need to implement this quite yet - and not for ConstantInt anyhow.

llvm-svn: 112798

llvm-svn: 112795

llvm-svn: 112793

llvm-svn: 112790

into the "address selection" routine and handle constant materialization
for stores.

llvm-svn: 112788

llvm-svn: 112779

to try to allocate reserved registers.

llvm-svn: 112774

add, and subtract operations with zero-extended or sign-extended vectors.
Update tests.  Add auto-upgrade support for the old intrinsics.

llvm-svn: 112773

llvm-svn: 112760

check more strict, breaking some cases not checked in the
testsuite, but also exposes some foldings not done before,
as this example:

  movaps  (%rdi), %xmm0
  movaps  (%rax), %xmm1
  movaps  %xmm0, %xmm2
  movss %xmm1, %xmm2
  shufps  $36, %xmm2, %xmm0

now is generated as:

  movaps  (%rdi), %xmm0
  movaps  %xmm0, %xmm1
  movlps  (%rax), %xmm1
  shufps  $36, %xmm1, %xmm0

llvm-svn: 112753

llvm-svn: 112752

llvm-svn: 112721

llvm-svn: 112712

the testcases should be merged.

llvm-svn: 112711

Use movlps, movlpd, movss and movsd specific nodes instead of pattern matching with movlp pattern fragment

llvm-svn: 112694

llvm-svn: 112689

llvm-svn: 112687