linkage, so remove it.

llvm-svn: 66690

llvm-svn: 66684

llvm-svn: 66660

linkage: this linkage type only applies to declarations,
but ODR is only relevant to globals with definitions.

llvm-svn: 66650

llvm-svn: 66645

llvm-svn: 66642

llvm-svn: 66540

llvm-svn: 66515

llvm-svn: 66508

ARM target now also recognize triplets like thumbv6-apple-darwin and set thumb mode and arch subversion. Eventually thumb triplets will go way and replaced with function notes.

llvm-svn: 66435

ARM isLegalAddressImmediate should check if type is a simple type now that optimizer can create values of funky scalar types.

llvm-svn: 66429

llvm-svn: 66382

llvm-svn: 66365

llvm-svn: 66360

llvm-svn: 66359

and extern_weak_odr.  These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global.  In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time.   This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function.  If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body.  The
code generators on the other hand map weak and weak_odr linkage
to the same thing.

llvm-svn: 66339

the same say the "test" instruction does in overflow cases,
so eliminating the test is only safe when those bits aren't
needed, as is the case for COND_E and COND_NE, or if it
can be proven that no overflow will occur. For now, just
restrict the optimization to COND_E and COND_NE and don't
do any overflow analysis.

llvm-svn: 66318

INC64_32r and INC64_16r, because these instructions are encoded
differently on x86-64. This fixes JIT regressions on x86-64 in
kimwitu++ and others.

llvm-svn: 66207

The extra operand didn't appear to cause any trouble, but it was
erroneous regardless.

llvm-svn: 66206

negative one, as subtracts of immediates are canonicalized
to adds.

llvm-svn: 66180

llvm-svn: 66058

llvm-svn: 66057

of MachineInstr def operands must be subtracted out. This bug
was uncovered by the recent x86 EFLAGS optimization. Before
that, the only instructions that ever needed unfolding were
things like CMP32rm, where NumDefs is zero.

llvm-svn: 66056

llvm-svn: 66024

llvm-svn: 66008

result from add, sub, inc, and dec instructions in simple cases.

llvm-svn: 66004

Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs.

llvm-svn: 65996

instructions. These aren't used yet.

llvm-svn: 65965

llvm-svn: 65962

and put @file directives on their own comment line.

llvm-svn: 65920

arbitrary vector sizes.  Add an optional MinSplatBits parameter to specify
a minimum for the splat element size.  Update the PPC target to use the
revised interface.

llvm-svn: 65899

method in a BuildVectorSDNode "pseudo-class".

llvm-svn: 65747

llvm-svn: 65662

 pic |  declaration | linkage  | visibility |

!pic |  declaration | external | default    | tls1.ll     tls2.ll     | local exec
 pic |  declaration | external | default    | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default    | tls3.ll     tls4.ll     | initial exec
 pic | !declaration | external | default    | tls3-pic.ll tls4-pic.ll | general dynamic

!pic |  declaration | external | hidden     | tls7.ll     tls8.ll     | local exec
 pic |  declaration | external | hidden     | X                       | local dynamic
!pic | !declaration | external | hidden     | tls9.ll     tls10.ll    | local exec
 pic | !declaration | external | hidden     | X                       | local dynamic

!pic |  declaration | internal | default    | tls5.ll     tls6.ll     | local exec
 pic |  declaration | internal | default    | X                       | local dynamic

The ones marked with an X have not been implemented since local dynamic is not implemented.

llvm-svn: 65632

possibly for the reason suggested by the comment.
No wonder it didn't work very well.  This unblocks
bootstrap with assertions on ppc.

llvm-svn: 65601

ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these intrinsics expect the high bits will not be modified.

llvm-svn: 65499

llvm-svn: 65482

related code.

llvm-svn: 65437

results via reference parameters.

This patch also appears to fix Evan's reported problem supplied as a
reduced bugpoint test case.

llvm-svn: 65426

them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.

llvm-svn: 65379