llvm-svn: 73736

llvm-svn: 73734

Add a parent pointer to SCEV, in preparation for getting rid of the global uniquing tables.  No functionality change.

llvm-svn: 73728

llvm-svn: 73727

llvm-svn: 73725

llvm-svn: 73723

llvm-svn: 73722

llvm-svn: 73721

On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body.

llvm-svn: 73720

llvm-svn: 73719

as signed max tests. Along with r73717, this helps CodeGen avoid
emitting code for a maximum operation for this class of loop.

llvm-svn: 73718

comparisons were recognized for umax, but instcombine canonicalizes
unsigned comparisons with zero to this simpler form.

llvm-svn: 73717

llvm-svn: 73716

llvm-svn: 73715

llvm-svn: 73714

llvm-svn: 73712

llvm-svn: 73710

Insert a SmartMutex templated class into the class hierarchy, which takes a template parameter specifying whether this mutex
should become a no-op when not running in multithreaded mode.  Make sys::Mutex a typedef of SmartMutex<false>, to preserve source compatibility.

llvm-svn: 73709

llvm-svn: 73708

llvm-svn: 73707

casted induction variables in cases where the cast
isn't foldable. It ended up being a pessimization in
many cases. This could be fixed, but it would require
a bunch of complicated code in IVUsers' clients. The
advantages of this approach aren't visible enough to
justify it at this time.

llvm-svn: 73706

C is not a low-bits mask, and add a similar instcombine for
zext((trunc(t) & C) ^ C).

llvm-svn: 73705

llvm-svn: 73704

llvm-svn: 73703

double-checked locking pattern here.

llvm-svn: 73701

Patch by Howard Su.

llvm-svn: 73680

llvm-svn: 73673

- Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints.
- Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping.
- More fixes to get ARM load / store double word working.

llvm-svn: 73671

adding a check to catch this case at compile time
instead of quietly generating incorrect code.
That will at least let us identify CBE failures
that are not due to this problem.

llvm-svn: 73668

llvm-svn: 73666

llvm-svn: 73665

If C is a single bit and the and gets analyzed as a truncate and
zero-extend, the xor can be represnted as an add.

llvm-svn: 73664

llvm-svn: 73663

llvm-svn: 73662

llvm-svn: 73661

Emit switch directive for it. I have no idea whether this is
requirement for Darwin or not.

llvm-svn: 73660

multiple users.

llvm-svn: 73656

llvm-svn: 73653

llvm-svn: 73647

llvm-svn: 73643