- Oct 29, 2013
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Manman Ren authored
To support ref_addr, we calculate the section offset of a DIE (i.e. offset of a DIE from beginning of the debug info section). The Offset field in DIE is currently CU-relative. To calculate the section offset, we add a DebugInfoOffset field in CompileUnit to store the offset of a CU from beginning of the debug info section. We set the value in DwarfUnits::computeSizeAndOffset for each CompileUnit. A helper function DIE::getCompileUnit is added to return the CU DIE that the input DIE belongs to. We also add a map CUDieMap in DwarfDebug to help finding the CU for a given CU DIE. For a cross-referenced DIE, we first find the CU DIE it belongs to with getCompileUnit, then we use CUDieMap to get the corresponding CU for the CU DIE. Adding the section offset of the CU with the CU-relative offset of a DIE gives us the seciton offset of the DIE. We correctly emit ref_addr with relocation using EmitLabelPlusOffset when doesDwarfUseRelocationsAcrossSections is true. This commit handles the emission of DW_FORM_ref_addr when we have an attribute with FORM_ref_addr. A follow-on patch will start using ref_addr when adding a DIEEntry. This commit will be tested and verified in the follow-on patch. Reviewed off-list by Eric, Thanks. llvm-svn: 193658
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Manman Ren authored
after the DIE creation, we construct the context first. Ensure that we create the context before we create a type so that we can add the newly created type to the parent. Remove last use of addToContextOwner now that it's not needed. We use createAndAddDIE to wrap around "new DIE(". Now all shareable DIEs should be added to their parents right after the creation. Reviewed off-list by Eric, Thanks. llvm-svn: 193657
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Manman Ren authored
Helper functions are added: emitPostLd: emit a post-increment load operation with given size. emitPostSt: emit a post-increment store operation with given size. No functionality change. llvm-svn: 193656
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Josh Magee authored
This modifies the pass to classify every SSP-triggering AllocaInst according to an SSPLayoutKind (LargeArray, SmallArray, AddrOf). This analysis is collected by the pass and made available for use, but no other pass uses it yet. The next patch will make use of this analysis in PEI and StackSlot passes. The end goal is to support ssp-strong stack layout rules. WIP. Differential Revision: http://llvm-reviews.chandlerc.com/D1789 llvm-svn: 193653
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Aaron Ballman authored
Removing a switch statement that contains only a default label. This resolves an MSVC warning. No functional change intended. llvm-svn: 193649
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Akira Hatanaka authored
llvm-svn: 193641
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Rafael Espindola authored
This allows constructing a Mangler with just a TargetMachine. llvm-svn: 193630
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Rafael Espindola authored
llvm-svn: 193627
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Weiming Zhao authored
Fixes PR17690 llvm-svn: 193625
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Amara Emerson authored
llvm-svn: 193624
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Zoran Jovanovic authored
llvm-svn: 193623
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Tom Stellard authored
v2: - Fix LDS size calculation Reviewed-by:
Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 193621
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Tom Stellard authored
llvm-svn: 193620
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Alexey Samsonov authored
Based on D2050 by Timur Iskhodzhanov. llvm-svn: 193619
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Rafael Espindola authored
llvm-svn: 193618
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Rafael Espindola authored
llvm-svn: 193617
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Rafael Espindola authored
llvm-svn: 193616
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Timur Iskhodzhanov authored
MSVC can't comprehend template<typename T, size_t N> ArrayRef<T> makeArrayRef(const T (&Arr)[N]) { return ArrayRef<T>(Arr); } if Arr is static const uint8_t sizes[]; declared in a templated and defined a few lines later. I'll send a proper fix (i.e. get rid of unnecessary templates) for review soon. llvm-svn: 193604
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Bernard Ogden authored
Adds a subtarget feature for the CRC instructions (optional in v8-A) to the ARM (32-bit) backend. Differential Revision: http://llvm-reviews.chandlerc.com/D2036 llvm-svn: 193599
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Anders Waldenborg authored
Sorry Peter Zotov, entirely my fault. llvm-svn: 193598
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Anders Waldenborg authored
Patch by Peter Zotov Differential Revision: http://llvm-reviews.chandlerc.com/D1910 llvm-svn: 193597
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Tim Northover authored
This is used in the Linux kernel, and effectively just means "print an address". llvm-svn: 193593
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Manman Ren authored
after the DIE creation, we construct the context first. This touches creation of namespaces and global variables. The purpose is to handle all DIE creations similarly: constructs the context first, then creates the DIE and immediately adds the DIE to its parent. We use createAndAddDIE to wrap around "new DIE(". llvm-svn: 193589
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Alp Toker authored
llvm-svn: 193579
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Richard Smith authored
llvm-svn: 193576
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NAKAMURA Takumi authored
error: conversion from `const uint8_t*' to non-scalar type `llvm::ArrayRef<unsigned char>' requested llvm-svn: 193575
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Arnold Schwaighofer authored
Updated a test case that assumed that <2 x double> would vectorize to use <4 x float>. radar://15338229 llvm-svn: 193574
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Arnold Schwaighofer authored
By vectorizing a series of srl, or, ... instructions we have obfuscated the intention so much that the backend does not know how to fold this code away. radar://15336950 llvm-svn: 193573
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Arnold Schwaighofer authored
No test case, because with the current cost model we don't see a difference. An upcoming ARM memory cost model change will expose and test this bug. radar://15332579 llvm-svn: 193572
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Joerg Sonnenberger authored
ELF. They can overlap with the other symbols, e.g. if a source file "foo.c" contains a function "foo" with a static variable "c". llvm-svn: 193569
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Manman Ren authored
This commit ensures DIEs are constructed within a compile unit and immediately added to their parents. Reviewed off-list by Eric. llvm-svn: 193568
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Manman Ren authored
More patches will be submitted to convert "new DIE(" to use createAddAndDIE in DwarfCompileUnit.cpp. This will simplify implementation of addDIEEntry where we have to decide between ref4 and ref_addr, because DIEs that can be shared across CU will be added to a CU already. Reviewed off-list by Eric. llvm-svn: 193567
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Manman Ren authored
It wraps around "new DIE(" and handles the bookkeeping part of the newly-created DIE. It adds the DIE to its parent, and calls insertDIE if necessary. It makes sure that bookkeeping is done at the earliest time and we should not see parentless DIEs if all constructions of DIEs go through this helper function. Later on, we can use an allocator for DIE allocation, and will only need to change createAndAddDIE instead of modifying all the "new DIE(". Reviewed off-list by Eric. llvm-svn: 193566
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Alexey Samsonov authored
Complicated CU-DIE-specific logic in the latter was never used, and it makes sense to have safety checks for broken dwarf in the former. llvm-svn: 193563
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Alexey Samsonov authored
DWARF parser: Use ArrayRef to represent form sizes and simplify DWARFDIE::extractFast() interface. No functionality change. llvm-svn: 193560
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Alexey Samsonov authored
llvm-svn: 193555
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Alexey Samsonov authored
Summary: Use DWARF4 table of form classes to fetch attributes from DIE in a more consistent way. This shouldn't change the functionality and serves as a refactoring for upcoming change: DW_AT_high_pc has different semantics depending on its form class. Reviewers: dblaikie, echristo Reviewed By: echristo CC: echristo, llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D1961 llvm-svn: 193553
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- Oct 28, 2013
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Akira Hatanaka authored
No functionality change. llvm-svn: 193540
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Lang Hames authored
an MCExpr, in order to avoid writing an encoded zero value in the immediate field. When getUnconditionalBranchTargetOpValue is called with an MCExpr target, we don't know what the final immediate field value should be. We shouldn't explicitly set the immediate field to an encoded zero value as zero is encoded with a non-zero bit pattern. This leads to bits being set that pollute the final immediate value. The nature of the encoding is such that the polluted bits only affect very large immediate values, explaining why this hasn't caused problems earlier. Fixes <rdar://problem/15155975>. llvm-svn: 193535
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Logan Chien authored
This commit allows the ARM integrated assembler to parse and assemble the code with .eabi_attribute, .cpu, and .fpu directives. To implement the feature, this commit moves the code from AttrEmitter to ARMTargetStreamers, and several new test cases related to cortex-m4, cortex-r5, and cortex-a15 are added. Besides, this commit also change the Subtarget->isFPOnlySP() to Subtarget->hasD16() to match the usage of .fpu directive. This commit changes the test cases: * Several .eabi_attribute directives in 2010-09-29-mc-asm-header-test.ll are removed because the .fpu directive already cover the functionality. * In the Cortex-A15 test case, the value for Tag_Advanced_SIMD_arch has be changed from 1 to 2, which is more precise. llvm-svn: 193524
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