PowerPC now has an asm parser (and has for many months now); indicate this in
PowerPC/LLVMBuild.txt.

llvm-svn: 197393

llvm-svn: 197392

llvm-svn: 197387

llvm-svn: 197385

Added scalar compare VCMPSS, VCMPSD.
Implemented LowerSELECT for scalar FP operations.
I replaced FSETCCss, FSETCCsd with one node type FSETCCs.
Node extract_vector_elt(v16i1/v8i1, idx) returns an element of type i1.

llvm-svn: 197384

llvm-config: Fixup r197380, tweak for cross compilation. SYSTEM_LIBS should be --host's in BuildTools/llvm-config.

FIXME: Host's llvm-config is not generated. It's for target's.
Host tools, aka "BuildTools", in utils, do not require llvm-config to build.

For example with --host=i686-pc-mingw32 --build=linux,

  $ BuildTools/Release+Asserts/bin/llvm-config --libs support
  -lLLVMSupport
  -lpthread -lshell32 -lpsapi -limagehlp -lm

llvm-svn: 197382

LLVM libs are printed in the first line, and system libs are printed in the next line.

  $ bin/llvm-config --libs object
  -lLLVMObject -lLLVMSupport
  -lrt -ldl -ltinfo -lpthread -lz

It is workaround for PR3347 and PR8449.

llvm-svn: 197380

llvm-svn: 197366

Currently we have such types as legal vector types. The DAG combiner may generate some DAG nodes having such types but we don't have patterns to match them.
E.g. a load i32 and a bitcast i32 to v1i32 will be combined into a load v1i32:
     bitcast (load i32) to v1i32 -> load v1i32.
So this patch fixes such problems for load/dup instructions.
If v1i8/v1i16/v1i32 are not legal any more, the code in this patch can be deleted. So I also add some FIXME.

llvm-svn: 197361

that follows).

llvm-svn: 197358

llvm-svn: 197357

part of a multi-line pseudo which worked around a linker bug for mips16.

llvm-svn: 197356

Some tiny cosmetic code changes to follow. Because of the wide
ranging nature of the patch a full 24 test cycle was needed to
check against regression. This was the smallest patch I could
make to progress from the earlier ones in the series. 

llvm-svn: 197350

llvm-svn: 197348

llvm-svn: 197340

llvm-svn: 197335

llvm-svn: 197332

llvm-svn: 197329

llvm-svn: 197327

This is a base implementation of the powerpc-apple-darwin asm parser dialect.

* Enables infrastructure (essentially isDarwin()) and fixes up the parsing of asm directives to separate out ELF and MachO/Darwin additions.
* Enables parsing of {r,f,v}XX as register identifiers.
* Enables parsing of lo16() hi16() and ha16() as modifiers.

The changes to the test case are from David Fang (fangism).

llvm-svn: 197324

llvm-svn: 197323

This optional register liveness analysis pass can be enabled with either
-enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass
traverses each basic block in a machine function. For each basic block the
instructions are processed in reversed order and if a patchpoint or stackmap
instruction is encountered the current live-out register set is encoded as a
register mask and attached to the instruction.

Later on during stackmap generation the live-out register mask is processed and
also emitted as part of the stackmap.

This information is optional and intended for optimization purposes only. This
will enable a client of the stackmap to reason about the registers it can use
and which registers need to be preserved.

Reviewed by Andy

llvm-svn: 197317

llvm-svn: 197316

Reviewed by Andy

llvm-svn: 197315

No functionality change.

llvm-svn: 197312

No functionality change.

llvm-svn: 197311

No functionality change.

llvm-svn: 197310

[block-freq] Rename getEntryFrequency() -> getEntryFreq() to match getBlockFreq() in all *BlockFrequencyInfo*.

llvm-svn: 197304

[block-freq] Teach branch probability how to return the edge weight in between a BasicBlock and one of its successors.

IMHO At some point BasicBlock should be refactored along the lines of
MachineBasicBlock so that successors/weights are actually embedded within the
block. Now is not that time though.

llvm-svn: 197303

llvm-svn: 197302

llvm-svn: 197297

[block-freq] Refactor LiveInterals::getSpillWeight to use the new MachineBlockFrequencyInfo methods.

This is slightly more interesting than the previous batch of changes.
Specifically:

1. We refactor getSpillWeight to take a MachineBlockFrequencyInfo (MBFI)
object. This enables us to completely encapsulate the actual manner we
use the MachineBlockFrequencyInfo to get our spill weights. This yields
cleaner code since one does not need to fetch the actual block frequency
before getting the spill weight if all one wants it the spill weight. It
also gives us access to entry frequency which we need for our
computation.

2. Instead of having getSpillWeight take a MachineBasicBlock (as one
might think) to look up the block frequency via the MBFI object, we
instead take in a MachineInstr object. The reason for this is that the
method is supposed to return the spill weight for an instruction
according to the comments around the function.

llvm-svn: 197296

Use CHECK-LABEL, add an i64 version, check store instructions.

llvm-svn: 197293

llvm-svn: 197292

[block-freq] Store MBFI as a field on SpillPlacement so we can access it to get the entry frequency while processing data.

llvm-svn: 197291

[block-freq] Update MachineBlockPlacement and RegAllocGreedy to use the new MachineBlockFrequencyInfo methods.

llvm-svn: 197290

llvm-svn: 197289

llvm-svn: 197288

[block-freq] Add the equivalent methods to MachineBlockFrequencyInfo and BlockFrequencyInfo that were added to BlockFrequencyImpl in r197285 and r197284.

llvm-svn: 197287

llvm-svn: 197286