llvm-svn: 83921

bootstrap of FSF-style PPC, so there is some
reason to believe the original bug (which was
never analyzed) has been fixed, probably by
82266.

llvm-svn: 83871

llvm-svn: 83857

compile time penalty on gnugo, the worst case in MultiSource, is down to
about 2.5% from 30%

llvm-svn: 83824

llvm-svn: 83822

into MachineInstrs. This is mostly just moving the code from
ScheduleDAGSDNodesEmit.cpp into a new class. This decouples MachineInstr
emitting from scheduling.

llvm-svn: 83699

since it won't do any folding. This will help avoid some inconvenient
casting.

llvm-svn: 83698

llvm-svn: 83695

it isn't needed in the ScheduleDAGSDNodes schedulers.

llvm-svn: 83691

is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.

This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.

llvm-svn: 83687

Extract scope information from the variable itself, instead of relying on alloca or llvm.dbg.declare location.

While recording beginning of a function, use scope info from the first location entry instead of just relying on first location entry itself.

llvm-svn: 83684

TargetInstrDesc::isRematerializable flag, so it isn't necessary to do
this check in its callers.

llvm-svn: 83671

information when unfolding memory references.

llvm-svn: 83656

Check invalid debug info for enums. This may happen when underlyng enum is optimized away. Eventually DwarfChecker will clean this up during llvm verification stage.

llvm-svn: 83655

llvm-svn: 83653

llvm-svn: 83624

llvm-svn: 83622

llvm-svn: 83608

llvm-svn: 83589

llvm-svn: 83571

similar to getTargetExtractSubreg.

llvm-svn: 83564

Do not record line number to implicitly mark start of function if function has arguments. Extra line number entries trip gdb in some cases.

llvm-svn: 83563

to declare that they preserve other passes without needing to pull in
additional header file or library dependencies. Convert MachineFunctionPass
and CodeGenLICM to make use of this.

llvm-svn: 83555

llvm-svn: 83521

bugfix. The target may use virtual registers that aren't tracked for re-use but are allocated by the scavenger. The re-use algorithm needs to watch for that.

llvm-svn: 83519

llvm-svn: 83501

llvm-svn: 83500

llvm-svn: 83496

llvm-svn: 83483

llvm-svn: 83481

to finish it any time soon.  If someone's interested it, they can resurrect it from SVN history.

llvm-svn: 83480

teach it how to recognize invariant physical registers.

llvm-svn: 83476

implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

llvm-svn: 83475

llvm-svn: 83474

a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.

eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.

ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.

llvm-svn: 83467

llvm-svn: 83437

This is not yet enabled.

llvm-svn: 83400

verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.

Also, factor out the relevant code out of all the targets and into
target-independent code.

llvm-svn: 83392

where the element is of a basic builtin type.  For example, to get
an i8* use getInt8PtrTy.

llvm-svn: 83379

llvm-svn: 83378