llvm-svn: 76986

llvm-svn: 76984

llvm-svn: 76983

llvm-svn: 76977

llvm-svn: 76976

llvm-svn: 76975

into its own helper function.

llvm-svn: 76974

virtual one.

llvm-svn: 76973

llvm-svn: 76972

when we have a global with no section explicitly specified.

llvm-svn: 76971

llvm-svn: 76967

llvm-svn: 76962

llvm-svn: 76960

implementation, eliminating a dupe.

llvm-svn: 76953

llvm-svn: 76951

llvm-svn: 76950

and simplify some other code.

llvm-svn: 76949

The later doesn't depend on any crazy LLVM IR stuff, and this
pulls the concatenation of prefix with GV name (the root problem behind
PR4584) out one level.

llvm-svn: 76948

llvm-svn: 76945

llvm-svn: 76944

llvm-svn: 76942

llvm-svn: 76941

llvm-svn: 76938

llvm-svn: 76937

llvm-svn: 76936

a sad mistake that is regretted. :)

llvm-svn: 76935

llvm-svn: 76930

FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructions on all sub-targets.

llvm-svn: 76925

to support vector arguments and scalar arguments correctly. Update
lowering and fix comment to refer to pinsr* instead of insertps.

llvm-svn: 76921

llvm-svn: 76920

Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination more exactly for Thumb-2 to get better code gen.

llvm-svn: 76919

for the assembler/disassembler to use.

llvm-svn: 76914

llvm-svn: 76909

testsuite, due to exception handling not working
correctly.  Maybe because the libgcc unwinder is
miscompiled - not sure, and I won't have time to
look into it before leaving on holiday.  Note that
miscompilations of libgcc are not picked up by the
nightly testers, because they dynamically link with
libgcc, so pick up the system version rather than
the version built as part of llvm-gcc.  This is a
nasty flaw in the nightly testers.  (On the other
hand the Ada testsuite links with the just built
libgcc).

llvm-svn: 76895

Also fixed up code to fully use the SoImm field for ADR on ARM mode.

llvm-svn: 76890

Since we have moved unified assembly, switch to ADR instruction instead of a the difficult-to-read .set + add syntax to materialize pc-relative address.

Turns out this also fixed a poor code selection on Thumb1. I have no idea why we were using a mov + add to do the same thing as ADR before.

llvm-svn: 76889

Fix frame index elimination to correctly handle thumb-2 addressing modes that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset.

llvm-svn: 76883

llvm-svn: 76872

testcases to make sure it's being generated.

llvm-svn: 76843

llvm-svn: 76842