Skip to content
  1. Aug 18, 2007
  2. Aug 02, 2007
  3. Jul 27, 2007
  4. Jul 25, 2007
  5. Jul 21, 2007
  6. Jul 19, 2007
    • Evan Cheng's avatar
      Change instruction description to split OperandList into OutOperandList and · 94b5a80b
      Evan Cheng authored
      InOperandList. This gives one piece of important information: # of results
      produced by an instruction.
      An example of the change:
      def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                       "add{l} {$src2, $dst|$dst, $src2}",
                       [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
      =>
      def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                       "add{l} {$src2, $dst|$dst, $src2}",
                       [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
      
      llvm-svn: 40033
      94b5a80b
  7. Jul 12, 2007
  8. Jul 11, 2007
  9. Jul 09, 2007
  10. Jun 06, 2007
    • Bruno Cardoso Lopes's avatar
      Initial Mips support, here we go! =) · 35e43c49
      Bruno Cardoso Lopes authored
      - Modifications from the last patch included
        (issues pointed by Evan Cheng are now fixed).
      - Added more MipsI instructions.
      - Added more patterns to match branch instructions.
      
      llvm-svn: 37461
      35e43c49
Loading