Commits · 0cdd3b1d817a8c366e10a1240589dd641b30b9bb · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

May 14, 2019
- [NewPM] Port HWASan and Kernel HWASan · 0cdd3b1d
  Leonard Chan authored May 14, 2019
  0cdd3b1d
- [LICM] Allow AliasSetMap to contain top-level loops. · 53c9d585
  Florian Hahn authored May 14, 2019
  53c9d585
- [AMDGPU][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases · ee51d851
  Dmitry Preobrazhensky authored May 14, 2019
  ee51d851
- [LVI][CVP] Add support for abs/nabs select pattern flavor · 48c4e4fa
  Nikita Popov authored May 14, 2019
  48c4e4fa
- [MemorySSA] LoopSimplify preserves MemorySSA only when flag is flipped. · 80c6e796
  Alina Sbirlea authored May 14, 2019
  80c6e796
- Fix a release mode warning introduced in r360694 · 75ad8c5d
  Philip Reames authored May 14, 2019
  75ad8c5d
- [IndVars] Extend reasoning about loop invariant exits to non-header blocks · bd8d3091
  Philip Reames authored May 14, 2019
  bd8d3091
- Support FNeg in SpeculativeExecution pass · 7c5c0c9f
  Cameron McInally authored May 14, 2019
  7c5c0c9f
- [AMDGPU] Fixed handling of imemdiate i1 literals · 05791d90
  Stanislav Mekhanoshin authored May 14, 2019
  05791d90
- [AMDGPU] Fixed +DumpCode · 33cb8f5b
  Tim Renouf authored May 14, 2019
  33cb8f5b
- [X86] Disable shouldFoldConstantShiftPairToMask for scalar shifts on AMD targets (PR40758) · c2d9cfd9
  Simon Pilgrim authored May 14, 2019
  c2d9cfd9
- [AArch64][SVE2] Asm: add SQRDMLAH/SQRDMLSH instructions · 3b917019
  Cullen Rhodes authored May 14, 2019
  3b917019
- [AArch64][SVE2] Asm: add integer multiply-add/subtract (indexed) instructions · e029da46
  Cullen Rhodes authored May 14, 2019
  e029da46
- DWARF v5: emit DW_AT_addr_base if DW_AT_low_pc references .debug_addr · 2f6ef2fc
  Fangrui Song authored May 14, 2019
  2f6ef2fc
- [PowerPC] Custom lower known CR bit spills · 22561972
  Lei Huang authored May 14, 2019
  22561972
- [APFloat] APFloat::Storage::Storage - fix use after move · 9fd3be29
  Simon Pilgrim authored May 14, 2019
  9fd3be29
- Save the induction binary operator in IVDescriptors for non FP induction variables. · 37b7922d
  Kit Barton authored May 14, 2019
  37b7922d
- TableGen: support #ifndef in addition to #ifdef. · 717b62a1
  Tim Northover authored May 14, 2019
  717b62a1
- Reinstate "FileCheck [5/12]: Introduce regular numeric variables" · 7b4ecdd3
  Thomas Preud'homme authored May 14, 2019
  7b4ecdd3
- [X86] X86TargetLowering::LowerINTRINSIC_WO_CHAIN - ensure rounding control is initialized. NFCI. · 2747ee2c
  Simon Pilgrim authored May 14, 2019
  2747ee2c
- AArch64: support binutils-like things on arm64_32. · ff6875ac
  Tim Northover authored May 14, 2019
  ff6875ac
- GlobalOpt: do not promote globals used atomically to constants. · ed9117f8
  Tim Northover authored May 14, 2019
  ed9117f8
- [MemorySanitizer] getMMXVectorTy - assert valid element size. NFCI. · 15842132
  Simon Pilgrim authored May 14, 2019
  15842132
- [IRTranslator] Don't hardcode GEP index type · a568222d
  Diana Picus authored May 14, 2019
  a568222d
- Revert "FileCheck [5/12]: Introduce regular numeric variables" · 00439368
  Thomas Preud'homme authored May 14, 2019
  00439368
- [X86] Prefer locked stack op over mfence for seq_cst 64-bit stores on 32-bit targets · 3098e44d
  Philip Reames authored May 14, 2019
  3098e44d
- [Object] Change ObjectFile::getSectionContents to return Expected<ArrayRef<uint8_t>> · e1cb2c0f
  Fangrui Song authored May 14, 2019
  e1cb2c0f
- [SDAG] fix unused variable warning and unneeded indirection; NFC · 99d6420a
  Sanjay Patel authored May 14, 2019
  99d6420a
- [SDAG, x86] allow targets to override test for binop opcodes · 3a13d970
  Sanjay Patel authored May 14, 2019
  3a13d970
- [coroutines] Fix spills of static array allocas · d64455cd
  Gor Nishanov authored May 13, 2019
  d64455cd
- [X86] Use ISD::MERGE_VALUES to return from lowerAtomicArith instead of calling... · e2966473
  Craig Topper authored May 13, 2019
  e2966473
May 13, 2019
- [X86] Various type corrections to the code that creates... · 5f999c2b
  Craig Topper authored May 13, 2019
  5f999c2b
- [JITLink][MachO] Honor the no-dead-strip flag on nlist entries. · 56baade1
  Lang Hames authored May 13, 2019
  56baade1
- [WebAssembly] Don't assume that zext/sext result is i32/i64 in fast isel (PR41841) · 323dc634
  Nikita Popov authored May 13, 2019
  323dc634
- [AMDGPU] Reorder includes per coding standard. NFC. · 79b2828b
  Stanislav Mekhanoshin authored May 13, 2019
  79b2828b
- [AMDGPU] Remove now unused V2FP16_ONE constant def. NFC. · 21088639
  Stanislav Mekhanoshin authored May 13, 2019
  21088639
- Revert [X86] Avoid SFB - Fix inconsistent codegen with/without debug info · 91a9d4ef
  Robert Lougher authored May 13, 2019
  91a9d4ef
- [InstCombine] try harder to form rotate (funnel shift) (PR20750) · 760f61ab
  Sanjay Patel authored May 13, 2019
  760f61ab
- [TargetLowering] Handle multi depth GEPs w/ inline asm constraints · c33f754e
  Nick Desaulniers authored May 13, 2019
  c33f754e
- [X86][SSE] LowerBuildVectorv4x32 - don't insert MOVQ for undef elts · 73aee290
  Simon Pilgrim authored May 13, 2019
  73aee290