llvm-svn: 45455

llvm-svn: 45454

Use MachineOperand::getImm instead of MachineOperand::getImmedValue.  Likewise setImmedValue -> setImm

llvm-svn: 45453

llvm-svn: 45452

llvm-svn: 45451

llvm-svn: 45450

machineinstr that owns it.

llvm-svn: 45449

llvm-svn: 45446

llvm-svn: 45445

function, then go ahead and hoist it out of the loop. This is the result:

$ cat a.c
volatile int G;

int A(int N) {
  for (; N > 0; --N)
    G++;
}
$ llc -o - -relocation-model=pic
_A:
...
LBB1_2: # bb
        movl    L_G$non_lazy_ptr-"L1$pb"(%eax), %esi
        incl    (%esi)
        incl    %edx
        cmpl    %ecx, %edx
        jne     LBB1_2  # bb
...
$ llc -o - -relocation-model=pic -machine-licm
_A:
...
        movl    L_G$non_lazy_ptr-"L1$pb"(%eax), %eax
LBB1_2: # bb
        incl    (%eax)
        incl    %edx
        cmpl    %ecx, %edx
        jne     LBB1_2  # bb
...

I'm limiting this to the MOV32rm x86 instruction for now.

llvm-svn: 45444

llvm-svn: 45439

llvm-svn: 45438

llvm-svn: 45437

llvm-svn: 45436

llvm-svn: 45435

llvm-svn: 45434

llvm-svn: 45433

llvm-svn: 45432

llvm-svn: 45431

   operand type.
2. Move these create methods below the accessors.
3. Simplify all the MachineInstr::add* methods to use these.

llvm-svn: 45430

llvm-svn: 45429

llvm-svn: 45428

llvm-svn: 45425

llvm-svn: 45424

llvm-svn: 45423

llvm-svn: 45422

llvm-svn: 45421

llvm-svn: 45420

llvm-svn: 45419

llvm-svn: 45418

llvm-svn: 45416

llvm-svn: 45415

llvm-svn: 45414

discussion of this change.  Boy are my fingers tired. ;-)

llvm-svn: 45411

discussion of this change.

llvm-svn: 45409

llvm-svn: 45408

eliminating the llvm.x86.sse2.loadl.pd intrinsic?), one shuffle optzn
may be done (if shufps is better than pinsw, Evan, please review), and
we already know about LICM of simple instructions.

llvm-svn: 45407

llvm-svn: 45406

comparisons with a constant.  This allows us to compile isnan to:

_foo:
	fcmpu cr7, f1, f1
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 

instead of:

LCPI1_0:					;  float
	.space	4
_foo:
	lis r2, ha16(LCPI1_0)
	lfs f0, lo16(LCPI1_0)(r2)
	fcmpu cr7, f1, f0
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 

llvm-svn: 45405

llvm-svn: 45404