some instructions can have multiple frame indices in them.  If this happens,
rewrite all of them.

llvm-svn: 35785

llvm-svn: 34965

llvm-svn: 34786

llvm-svn: 34772

llvm-svn: 34735

llvm-svn: 34711

llvm-svn: 34706

llvm-svn: 34691

forward() should not increment internal iterator. Its client may insert instruction between now and next forward() call.

llvm-svn: 34649

llvm-svn: 34516

for debugging and exception handling.

llvm-svn: 33550

rounding the stack frame to a multiple of stack alignment.

llvm-svn: 33504

PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary.

llvm-svn: 33460

llvm-svn: 33396

We not align the final stack slot but instead let the target do so in emitPrologue(). Each target can make adjustments to the stack frame and re-align the stack as it deem appropriate. Do not align it twice which can end up wasting stack space.

llvm-svn: 33387

- Make use of spillCalleeSavedRegisters() and restoreCalleeSavedRegisters().

llvm-svn: 32822

llvm-svn: 32299

TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller.

llvm-svn: 30648

incoming stack. This allows X86 backend to use push / pop in epilogue /
prologue.

llvm-svn: 30636

llvm-svn: 30616

llvm-svn: 29911

llvm-svn: 29888

information and exception handling.

llvm-svn: 29881

llvm-svn: 28973

llvm-svn: 28253

llvm-svn: 27491

llvm-svn: 27380

llvm-svn: 24227

alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.

llvm-svn: 24224

llvm-svn: 23559

class into the spill/reload methods.  Targets can now rely on that argument.

llvm-svn: 23556

code.  PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.

llvm-svn: 23536

Olden/bisort among others.

llvm-svn: 23124

llvm-svn: 23108

terminator instructions before the 'ret' in case the target has a
multi-instruction return sequence.

llvm-svn: 22041

llvm-svn: 21982

llvm-svn: 21420

registers.  This information is computed directly by the register allocator
now.

llvm-svn: 19795

llvm-svn: 19787

This fixes the return-address-not-being-saved problem in the Alpha backend.

llvm-svn: 19741