llvm-svn: 138006

This patch adds support of NativeClient (*-*-nacl) OS support to LLVM.
It's already supported in autoconf/config.sub.

The motivation for this change is to start upstreaming PNaCl work. The
whole set of patches include llvm backends (i686, x86_64, ARM),
llvm-gcc (probably, would not be upstreamed because it's deprecated)
and clang (the work has been just started, the amount of changes is
going to be low and the most of the work is expected to be done close
to the mainline).

llvm-svn: 138005

STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate.
Found by randomized testing.

llvm-svn: 138003

llvm-svn: 138000

llvm-svn: 137998

Remember to fill in some operands so we can print _something_ coherent even when decoding the CPS instruction soft-fails.

llvm-svn: 137997

Fixes a large class of disassembler crashes found by randomized testing.

llvm-svn: 137995

llvm-svn: 137993

Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.

llvm-svn: 137986

llvm-svn: 137985

aren't from an indirect branch need to be dominated by the loop header.

llvm-svn: 137981

function.

llvm-svn: 137979

llvm-svn: 137978

anonymous namespace.

llvm-svn: 137975

of debug info.

llvm-svn: 137972

llvm-svn: 137963

llvm-svn: 137959

llvm-svn: 137956

llvm-svn: 137953

These fixups are handled poorly in general, and should have a single
contiguous range of bits per fixup type, but that's not how they're
currently organized, so for now in complex ones like for blx, we just tell the
emitter it's OK for the fixup to munge any bit it wants.

llvm-svn: 137947

llvm-svn: 137946

llvm-svn: 137943

llvm-svn: 137941

llvm-svn: 137938

llvm-svn: 137933

functionality change.

llvm-svn: 137926

v2i64

llvm-svn: 137919

Dramatically speedup codegen prepare by a) avoiding use of dominator tree and b) doing a separate pass over dbg.value instructions.

llvm-svn: 137908

llvm-svn: 137900

llvm-svn: 137897

llvm-svn: 137892

llvm-svn: 137891

llvm-svn: 137890

llvm-svn: 137889

llvm-svn: 137888

shift amount is variable

llvm-svn: 137885

llvm-svn: 137881

The landingpad instruction is lowered into the EXCEPTIONADDR and EHSELECTION
SDNodes. The information from the landingpad instruction is harvested by the
'AddLandingPadInfo' function. The new EH uses the current EH scheme in the
back-end. This will change once we switch over to the new scheme. (Reviewed by
Jakob!)

llvm-svn: 137880

Represent the operand value as it will be encoded in the instruction. This
allows removing the specialized encoder and decoder methods entirely. Add
an assembler match class while we're at it to lay groundwork for parsing the
thumb shift instructions.

llvm-svn: 137879

PRE needs the landing pads to have their critical edges split. Doing this for a
landing pad is non-trivial. Abandon the attempt to perform PRE when we come
across a landing pad. (Reviewed by Owen!)

llvm-svn: 137876