Enable the pass by default for targets that request it, and change the
-enable-early-ifcvt to the opposite -disable-early-ifcvt.

There are still some x86 regressions when enabling early if-conversion
because of the missing machine models. Disable the pass for x86 until
machine models are added.

llvm-svn: 165075

each one separately, process a stack of MemberExpr's as a single unit so that
static calls and member access will not be warned on.

llvm-svn: 165074

preserves the values of the relocated entries, unlikely remove_if. This
allows walking them and erasing them.

Also flesh out the predicate we are using for this to support the
various constraints actually imposed on a UnaryPredicate -- without this
we can't compose it with std::not1.

Thanks to Sean Silva for the review here and noticing the issue with
std::remove_if.

llvm-svn: 165073

X86DAGToDAGISel::PreprocessISelDAG(), isel is moving load inside
callseq_start / callseq_end so it can be folded into a call. This can
create a cycle in the DAG when the call is glued to a copytoreg. We
have been lucky this hasn't caused too many issues because the pre-ra
scheduler has special handling of call sequences. However, it has
caused a crash in a specific tailcall case.

rdar://12393897

llvm-svn: 165072

This reverts 165055 and 165052 temporarily while I look at debugger
failures.

llvm-svn: 165071

llvm-svn: 165070

llvm-svn: 165069

Summary: Uses [[clang::fallthrough]] attribute in a template function, and -Wimplicit-fallthrough to check the attribute presence in an instantiation.

Reviewers: rsmith

Reviewed By: rsmith

CC: cfe-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D55

llvm-svn: 165068

The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.

If the code is generated as assembler, this transformation does not occur assuming that it will occur later in the assembler.

This code was originally called from  MipsAsmPrinter.cpp and we needed to check for OutStreamer.hasRawTextSupport(). This was not a good place for it and has been moved to MCTargetDesc/MipsMCCodeEmitter.cpp where both direct object and the assembler use it it automagically.

The test cases have been checked in for a number of weeks now.

llvm-svn: 165067

attribute going iinto XML document.

llvm-svn: 165066

scheduled for processing on the worklist eventually gets deleted while
we are processing another alloca, fixing the original test case in
PR13990.

To facilitate this, add a remove_if helper to the SetVector abstraction.
It's not easy to use the standard abstractions for this because of the
specifics of SetVectors types and implementation.

Finally, a nice small test case is included. Thanks to Benjamin for the
fantastic reduced test case here! All I had to do was delete some empty
basic blocks!

llvm-svn: 165065

also makes it more consistent with Clang and several passes' doxygen
style.

llvm-svn: 165064

llvm-svn: 165063

The new algorithm has been enabled by default for almost a week now and
seems to be stable.

llvm-svn: 165062

the Symbols::LocateExecutableObjectFile method to locate kexts and
kernels instead of copying them out of the memory of the remote
system.  This is the fix for <rdar://problem/12416384>.

Fix a variable shadowing problem in
Symbols::LocateMacOSXFilesUsingDebugSymbols which caused the symbol
rich executable binaries to not be found even if they were listed
in the dSYM Info.plist.

Change Symbols::DownloadObjectAndSymbolFile to ignore dsymForUUID's
negative cache - this is typically being called by the user and we
should try even if there's a incorrect entry in the negative cache.

llvm-svn: 165061

Reserved register live ranges look like a set of dead defs - any uses of
reserved registers are ignored.

Instead of skipping the updating of reserved register operands entirely,
just ignore the use operands and treat the def operands normally.

No test case, handleMove() is not commonly used yet.

llvm-svn: 165060

llvm-svn: 165059

A Sema lookup is used to determine the size of the variable, which is in turn
used during wildcard matching.

llvm-svn: 165058

of operand is specific to MS-style inline assembly and should not be generated
when parsing normal assembly.

The purpose of the wildcard operands are to allow the AsmParser to match
multiple instructions (i.e., MCInsts) to a given ms-style asm statement.  For
the time being the matcher just returns the first match.  This patch only
implements wildcard matches for memory operands.  Support for register
wildcards will be added in the near future.

llvm-svn: 165057

JoinVals::pruneValues() calls LIS->pruneValue() to avoid conflicts when
overlapping two different values. This produces a set of live range end
points that are used to reconstruct the live range (with SSA update)
after joining the two registers.

When a value is pruned twice, the set of end points was insufficient:

  v1 = DEF
  v1 = REPLACE1
  v1 = REPLACE2
  KILL v1

The end point at KILL would only reconstruct the live range from
REPLACE2 to KILL, leaving the range REPLACE1-REPLACE2 dead.

Add REPLACE2 as an end point in this case so the full live range is
reconstructed.

This fixes PR13999.

llvm-svn: 165056

llvm-svn: 165055

llvm-svn: 165054

llvm-svn: 165053

prologue. Also skip frame setup instructions when looking for the
first location.

llvm-svn: 165052

llvm-svn: 165051

in the block.

llvm-svn: 165050

with just an insert point from the MachineBasicBlock and let
the location be updated as we access it.

llvm-svn: 165049

llvm-svn: 165048

as key instead of a SLocEntry pointer. This allows the array of
file sorted declarations in a PCH/module to be deterministic.

llvm-svn: 165047

declarations of the current primary module.

llvm-svn: 165046

llvm-svn: 165045

an intermediate helper method to query and populate the Optional value.

llvm-svn: 165043

llvm-svn: 165042

table, making it printable with the ConfigDump checker.  Along the
way, fix a really serious bug where the value was getting parsed
from the string in code that was in an assert() call.  This means
in a Release-Asserts build this code wouldn't work as expected.

llvm-svn: 165041

the config string table.  Also setup a test for dumping the analyzer
configuration for C++.

llvm-svn: 165040

to XML output. // rdar://12378879

llvm-svn: 165039

llvm-svn: 165038

This pass implements a new code generator that uses the code generation
algorithm included in isl.

For the moment the new code generation is limited to sequential code.

llvm-svn: 165037

llvm-svn: 165036

llvm-svn: 165035