the tail of a block may make that block a new candidate for duplication.

llvm-svn: 89264

llvm-svn: 89254

llvm-svn: 89252

llvm-svn: 89250

When TwoAddressInstructionPass deletes a dead instruction, make sure that all
register kills are accounted for. The 2-addr register does not get special
treatment.

llvm-svn: 89246

llvm-svn: 89245

Verify LiveVariables information when present.

llvm-svn: 89241

llvm-svn: 89240

Fixed the in-place spiller and trivial rewriter, which had been broken by the recent SlotIndexes work.

llvm-svn: 89238

Added getDefaultSubtargetFeatures method to SubtargetFeatures class which returns a correct feature string for given triple.

llvm-svn: 89236

llvm-svn: 89225

llvm-svn: 89218

llvm-svn: 89214

when LiveVariables is available.

The -split-phi-edges is now gone, and so is the hack to disable it when using
the local register allocator. The PHIElimination pass no longer has
LiveVariables as a prerequisite - that is what broke the local allocator.
Instead we do critical edge splitting when possible - that is when
LiveVariables is available.

llvm-svn: 89213

Clang.

llvm-svn: 89211

llvm-svn: 89210

llvm-svn: 89198

contents of the block to be duplicated.  Use this for ARM Cortex A8/9 to
be more aggressive tail duplicating indirect branches, since it makes it
much more likely that they will be predicted in the branch target buffer.
Testcase coming soon.

llvm-svn: 89187

This is probably not confined to *just* these two things.

Anyway, the llvm-gcc front-end may look up the structure layout information for
an abstract type. That information will be stored into a table with the FE's
TD. Instruction combine can come along and also ask for information on that
abstract type, but for a separate TD (the one associated with the pass manager).

After the type is refined, the old structure layout information in the pass
manager's TD file is out of date. If a new type is allocated in the same space
as the old-unrefined type, then the structure type information in the pass
manager's TD file will be wrong, but won't know it.

Fix this by making the TD's structure type information an abstract type user.

llvm-svn: 89176

llvm-svn: 89175

llvm-svn: 89167

llvm-svn: 89156

and creation interfaces.

llvm-svn: 89151

llvm-svn: 89150

llvm-svn: 89145

llvm-svn: 89143

llvm-svn: 89142

llvm-svn: 89139

llvm-svn: 89138

alignment imm (in the same way). Fix asmprinting for non-darwin platforms.

llvm-svn: 89137

llvm-svn: 89130

llvm-svn: 89129

The local register allocator doesn't like it when LiveVariables is run.
We should also disable edge splitting under -O0, but that has to wait a bit.

llvm-svn: 89125

llvm-svn: 89123

Added getArchNameForAssembler method to the Triple class for which returns OS and Vendor independent target assembler arch.

llvm-svn: 89122

unnecessary.  It is broken because the "isIdenticalTo" check should be
negated.  If that is fixed, this code causes the CodeGen/X86/tail-opts.ll
test to fail, in the dont_merge_oddly function.  And, I confirmed that the
regression is real -- the generated code is worse.  As far as I can tell,
that tail-opts.ll test is checking for what this code is supposed to handle
and we're doing the right thing anyway.

llvm-svn: 89121

llvm-svn: 89116

llvm-svn: 89114

of failure. The x86 target didn't like empty cpu names and broke x86 tests on
non-x86 buildbots.

llvm-svn: 89111

llvm-svn: 89110