- Feb 15, 2011
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Argyrios Kyrtzidis authored
llvm-svn: 125574
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Devang Patel authored
llvm-svn: 125571
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Devang Patel authored
llvm-svn: 125567
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Duncan Sands authored
llvm-svn: 125563
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Nadav Rotem authored
Fix 9216 - Endless loop in InstCombine pass. The pattern "A&(A^B) -> A & ~B" recreated itself because ~B is actually a xor -1. llvm-svn: 125557
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Evan Cheng authored
llvm-svn: 125552
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Devang Patel authored
llvm-svn: 125547
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Chris Lattner authored
llvm-svn: 125546
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Chris Lattner authored
llvm-svn: 125537
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Bob Wilson authored
llvm-svn: 125534
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Jakob Stoklund Olesen authored
Simplify the spill weight calculation a bit by bypassing getApproximateInstructionCount() and using LiveInterval::getSize() directly. This changes the computed spill weights, but only by a constant factor in each function. It should not affect how spill weights compare against each other, and so it shouldn't affect code generation. llvm-svn: 125530
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Devang Patel authored
Do not hoist @llvm.dbg.value. Here, @llvm.dbg.value is "referring" a value that is modified inside loop. llvm-svn: 125529
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- Feb 14, 2011
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Rafael Espindola authored
section. llvm-svn: 125526
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Evan Cheng authored
Fix PR8854. Track inserted copies to avoid read before write. Sorry, it's hard to reduce a sensible small test case. llvm-svn: 125523
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Bruno Cardoso Lopes authored
llvm-svn: 125521
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Chris Lattner authored
builders unhappy. llvm-svn: 125504
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Rafael Espindola authored
llvm-svn: 125490
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Bruno Cardoso Lopes authored
- Add custom operand matching for imod and iflags. - Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC from mnemonic. - While adding ".w" as an operand, don't change "Head" to avoid passing the wrong mnemonic to ParseOperand. - Add asm parser tests. - Add disassembler tests just to make sure it can catch all cps versions. llvm-svn: 125489
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Chris Lattner authored
idiom. Change various clients to simplify their code. llvm-svn: 125487
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Chris Lattner authored
vector fp conversions. llvm-svn: 125482
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Chris Lattner authored
llvm-svn: 125481
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Cameron Zwarich authored
llvm-svn: 125477
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Cameron Zwarich authored
llvm-svn: 125476
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- Feb 13, 2011
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Chris Lattner authored
have their low bits set to zero. This allows us to optimize out explicit stack alignment code like in stack-align.ll:test4 when it is redundant. Doing this causes the code generator to start turning FI+cst into FI|cst all over the place, which is general goodness (that is the canonical form) except that various pieces of the code generator don't handle OR aggressively. Fix this by introducing a new SelectionDAG::isBaseWithConstantOffset predicate, and using it in places that are looking for ADD(X,CST). The ARM backend in particular was missing a lot of addressing mode folding opportunities around OR. llvm-svn: 125470
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Chris Lattner authored
generating i8 shift amounts for things like i1024 types. Add an assert in getNode to prevent this from occuring in the future, fix the buggy transformation, revert my previous patch, and document this gotcha in ISDOpcodes.h llvm-svn: 125465
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Chris Lattner authored
llvm-svn: 125464
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Duncan Sands authored
llvm-svn: 125463
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Duncan Sands authored
plus some variations of this. According to my auto-simplifier this occurs a lot but usually in combination with max/min idioms. Because max/min aren't handled yet this unfortunately doesn't have much effect in the testsuite. llvm-svn: 125462
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Nadav Rotem authored
It caused a crash in MultiSource/Benchmarks/Bullet. Opt hit an assertion with "opt -std-compile-opts" because Constant::getAllOnesValue doesn't know how to handle floats. This patch added a test to reproduce the problem and a check that the destination vector is of integer type. Thank you Benjamin! llvm-svn: 125459
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Chris Lattner authored
the shift amounts are in a suitably wide type so that we don't generate out of range constant shift amounts. This fixes PR9028. llvm-svn: 125458
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Chris Lattner authored
is narrower than the shift register. Doing an anyext provides undefined bits in the top part of the register. llvm-svn: 125457
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Chris Lattner authored
We were previously simplifying divisions, but not right shifts! llvm-svn: 125454
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Chris Lattner authored
llvm-svn: 125451
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Chris Lattner authored
This fixes a FIXME in scev-aa.ll (allowing a new no-alias result) and generally makes things more precise. llvm-svn: 125449
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Reid Kleckner authored
These are just FXSAVE and FXRSTOR with REX.W prefixes. These versions use 64-bit pointer values instead of 32-bit pointer values in the memory map they dump and restore. llvm-svn: 125446
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- Feb 12, 2011
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Venkatraman Govindaraju authored
llvm-svn: 125444
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Daniel Dunbar authored
putchar transforms, their return values are not compatible. llvm-svn: 125442
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Benjamin Kramer authored
llvm-svn: 125438
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Nadav Rotem authored
The DAGCombiner created illegal BUILD_VECTOR operations. The patch added a check that either illegal operations are allowed or that the created operation is legal. llvm-svn: 125435
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Jim Grosbach authored
Teach the AsmMatcher handling to distinguish between an error custom-parsing an operand and a failure to match. The former should propogate the error upwards, while the latter should continue attempting to parse with alternative matchers. Update the ARM asm parser accordingly. llvm-svn: 125426
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