The <undef> flag says that a MachineOperand doesn't read its register,
or doesn't depend on the previous value of its register.

A full register def never depends on the previous register value.  A
partial register def may depend on the previous value if it is intended
to update part of a register.

For example:

  %vreg10:dsub_0<def,undef> = COPY %vreg1
  %vreg10:dsub_1<def> = COPY %vreg2

The first copy instruction defines the full %vreg10 register with the
bits not covered by dsub_0 defined as <undef>.  It is not considered a
read of %vreg10.

The second copy modifies part of %vreg10 while preserving the rest.  It
has an implicit read of %vreg10.

This patch adds a MachineOperand::readsReg() method to determine if an
operand reads its register.

Previously, this was modelled by adding a full-register <imp-def>
operand to the instruction.  This approach makes it possible to
determine directly from a MachineOperand if it reads its register.  No
scanning of MI operands is required.

llvm-svn: 141124

llvm-svn: 141123

llvm-svn: 141122

installations, support them when installed directly under the system
root ('/lib/gcc/...' essentially).

With this, Clang can correctly detect and use a cross-compiling GCC
installation within a system root and use it.

Again, test cases will be coming in later commits, as I'm going to write
a few test cases that exercise nearly all of this logic.

llvm-svn: 141121

two fundamental changes, as they ended up being interrelated.

The first is to walk from the root down through the filesystem so that
we prune subtrees which do not exist early. This greatly reduces the
filesystem traffic of this routine. We store the "best" GCC version we
encounter, and look at all of the GCC installations available.

Also, we look through GCC versions by scanning the directory rather than
using a hard-coded list of versions. This has several benefits. It makes
it much more efficient to locate a GCC installation even in the presence
of a large number of different options by simply reading the directory
once. It also future-proofs us as new GCC versions are released and
installed. We no longer have a hard coded list of version numbers, and
won't need to manually updated it. We can still filter out known-bad
versions as needed. Currently I've left in filtering for all GCC
installations prior to 4.1.1, as that was the first one supported
previously.

llvm-svn: 141120

the command line options (at least according to GCC's documentation). GCC 4.2
didn't appear to actually do this, but it seems like that has been fixed in
later release, so we will follow the docs.

llvm-svn: 141119

llvm-svn: 141118

llvm-svn: 141117

llvm-svn: 141116

llvm-svn: 141115

llvm-svn: 141114

llvm-svn: 141113

[analyzer] Removing references to CheckerContext::getNodeBuilder(): checkers can obtain block count directly from the Context.

llvm-svn: 141112

llvm-svn: 141111

llvm-svn: 141110

llvm-svn: 141108

llvm-svn: 141107

Remove a nonsensical bit of code from InitListChecker::getStructuredSubobjectInit which was increasing the reserved size for an init list past its maximum possible size. Fixes PR11056, a case where we were reserving a bunch of memory for arrays that was never actually used.

(No testcase because I don't think we have any way to actually write a testcase for this; the chosen value of NumElements has no effects on anything other than performance and memory usage.)

llvm-svn: 141106

This should unbreak the Windows build.

llvm-svn: 141105

llvm-svn: 141104

llvm-svn: 141103

Add a test to do list manipulation and pass the result as arguments.
This tests the new list element operator resolve code and provides an
example of using list manipulation to do instruction pattern
substitution.

llvm-svn: 141102

When resolving an operator list element reference, resolve all
operator operands and try to fold the operator first.  This allows the
operator to collapse to a list which may then be indexed.

Before, it was not possible to do this:
class D<int a, int b> { ... }
class C<list<int> A> : D<A[0], A[1]>;
class B<list<int> b> : C<!foreach(...,b)>;

Now it is.

llvm-svn: 141101

continuation class into warning. // rdar://10231514

llvm-svn: 141100

llvm-svn: 141099

llvm-svn: 141098

llvm-svn: 141097

llvm-svn: 141096

Put GCOVFile and other related interface in a common header so that llvm-cov tool can share it with GCOV writer.

llvm-svn: 141095

llvm-svn: 141093

llvm-svn: 141092

llvm-svn: 141089

llvm-svn: 141088

llvm-svn: 141087

llvm-svn: 141086

llvm-svn: 141085

The set of register classes should be closed under sub-register
operations and intersections. That will allow the register allocator to
model combinations of constraints accurately.

This patch implements the easiest form of register class inference:  For
every register class, and for every sub-register SubIdx, the subset of
registers in RC that have a SubIdx sub-register should also be a register
class.

This does create some new register classes for the targets in the tree:

ARM gets a new QQQQPR_with_ssub_0.  This class was omitted from the .td
file on purpose because it only has two registers.  InstrEmitter and
RegisterCoalescer have safeguards against selecting too small register
classes, so it is harmless.

PowerPC gets a G8RC_with_sub_32 class because LR is not a sub_32
sub-register of LR8.  I think that might be an omission?

X86 puts RIP in the GR64 class, and since that register doesn't have
8-bit sub-registers, we get:

  GR64_with_sub_8bit
  GR64_TC_with_sub_8bit
  GR64_NOREX_with_sub_8bit
  GR64_TC_with_sub_8bit_hi

The various CodeGen classes have already been fixed so adding new
register classes should not affect compile time.

llvm-svn: 141084

This has already been done for most other targets.

llvm-svn: 141083

There is no need to keep the primary order separate.

llvm-svn: 141082

When TableGen starts creating its own register classes, the synthesized
classes won't have a Record reference.  All register classes must have a
name, though.

llvm-svn: 141081