- Nov 24, 2013
-
-
Venkatraman Govindaraju authored
[Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of sethi+or. This generates correct code for both sparc32 and sparc64. llvm-svn: 195576
-
Venkatraman Govindaraju authored
llvm-svn: 195575
-
Venkatraman Govindaraju authored
[SparcV9]: Do not emit .register directives for global registers that are clobbered by calls but not used in the function itself. llvm-svn: 195574
-
Venkatraman Govindaraju authored
llvm-svn: 195573
-
- Nov 19, 2013
-
-
Juergen Ributzka authored
This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. The memory leaks in this version have been fixed. Thanks Alexey for pointing them out. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy llvm-svn: 195064
-
- Nov 18, 2013
-
-
Alexey Samsonov authored
This change is incorrect. If you delete virtual destructor of both a base class and a subclass, then the following code: Base *foo = new Child(); delete foo; will not cause the destructor for members of Child class. As a result, I observe plently of memory leaks. Notable examples I investigated are: ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl. llvm-svn: 194997
-
- Nov 15, 2013
-
-
Juergen Ributzka authored
This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy llvm-svn: 194865
-
- Nov 12, 2013
-
-
Roman Divacky authored
llvm-svn: 194500
-
- Nov 03, 2013
-
-
Venkatraman Govindaraju authored
llvm-svn: 193957
-
Venkatraman Govindaraju authored
llvm-svn: 193947
-
Venkatraman Govindaraju authored
llvm-svn: 193941
-
- Oct 31, 2013
-
-
Roman Divacky authored
llvm-svn: 193789
-
- Oct 29, 2013
-
-
Rafael Espindola authored
llvm-svn: 193627
-
- Oct 16, 2013
-
-
Rafael Espindola authored
We had a MCAsmInfoCOFF, but no common class for all the ELF MCAsmInfos before. llvm-svn: 192760
-
- Oct 09, 2013
-
-
Venkatraman Govindaraju authored
This patch fixes PR17506. llvm-svn: 192294
-
- Oct 08, 2013
-
-
NAKAMURA Takumi authored
llvm-svn: 192179
-
NAKAMURA Takumi authored
llvm-svn: 192178
-
Venkatraman Govindaraju authored
No new testcases. However, this patch makes all supported JIT testcases in test/ExecutionEngine pass on Sparc. llvm-svn: 192176
-
Venkatraman Govindaraju authored
[Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead. llvm-svn: 192160
-
- Oct 07, 2013
-
-
Rafael Espindola authored
They haven't been used for a long time. Patch by MathOnNapkins. llvm-svn: 192099
-
- Oct 06, 2013
-
-
Venkatraman Govindaraju authored
llvm-svn: 192056
-
Venkatraman Govindaraju authored
This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes. llvm-svn: 192054
-
Venkatraman Govindaraju authored
addx/subx does not modify conditional codes whereas addxcc/subxx does. llvm-svn: 192053
-
- Oct 05, 2013
-
-
Venkatraman Govindaraju authored
llvm-svn: 192023
-
Venkatraman Govindaraju authored
llvm-svn: 192015
-
Venkatraman Govindaraju authored
llvm-svn: 192006
-
- Sep 26, 2013
-
-
Venkatraman Govindaraju authored
llvm-svn: 191432
-
- Sep 22, 2013
-
-
Venkatraman Govindaraju authored
llvm-svn: 191180
-
Venkatraman Govindaraju authored
[Sparc] Make SPARC instructions' encoding well defined such that TableGen can automatically generate code emitter. llvm-svn: 191168
-
Venkatraman Govindaraju authored
[Sparc] Clean up MOVcc instructions so that TableGen can encode them correctly. No functionality change intended. llvm-svn: 191167
-
Venkatraman Govindaraju authored
[Sparc] Clean up branch instructions, so that TableGen can encode branch conditions as well. No functionality change intended. llvm-svn: 191166
-
Tim Northover authored
Previously, the DAGISel function WalkChainUsers was spotting that it had entered already-selected territory by whether a node was a MachineNode (amongst other things). Since it's fairly common practice to insert MachineNodes during ISelLowering, this was not the correct check. Looking around, it seems that other nodes get their NodeId set to -1 upon selection, so this makes sure the same thing happens to all MachineNodes and uses that characteristic to determine whether we should stop looking for a loop during selection. This should fix PR15840. llvm-svn: 191165
-
Venkatraman Govindaraju authored
llvm-svn: 191164
-
Venkatraman Govindaraju authored
llvm-svn: 191160
-
Venkatraman Govindaraju authored
llvm-svn: 191158
-
Venkatraman Govindaraju authored
llvm-svn: 191154
-
- Sep 05, 2013
-
-
Venkatraman Govindaraju authored
In sparc, setjmp stores only the registers %fp, %sp, %i7 and %o7. longjmp restores the stack, and the callee-saved registers (all local/in registers: %i0-%i7, %l0-%l7) using the stored %fp and register windows. However, this does not guarantee that the longjmp will restore the registers, as they were when the setjmp was called. This is because these registers may be clobbered after returning from setjmp, but before calling longjmp. This patch prevents the registers %i0-%i5, %l0-l7 to live across the setjmp call using the register mask. llvm-svn: 190033
-
- Sep 04, 2013
-
-
Venkatraman Govindaraju authored
This assertion is triggered because an integer constant is created with wrong type. llvm-svn: 189948
-
- Sep 03, 2013
-
-
Venkatraman Govindaraju authored
llvm-svn: 189780
-
- Sep 02, 2013
-
-
Venkatraman Govindaraju authored
llvm-svn: 189768
-