llvm-svn: 45415

providing a misleading facility. It's used once in the MIPS backend
and hardcoded as "\t.globl\t" everywhere else.

llvm-svn: 45338

Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.

llvm-svn: 44960

the stored register is killed.

llvm-svn: 44600

llvm-svn: 44517

llvm-svn: 44479

to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.

llvm-svn: 44056

llvm-svn: 44045

adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...

llvm-svn: 44037

Fixed some AsmPrinter issues
Added GLOBAL_OFFSET_TABLE Node handle.

llvm-svn: 44024

This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,

llvm-svn: 43997

llvm-svn: 43749

Removed all macro code for PIC (goodbye "la").
Support tested with shootout bench.

llvm-svn: 43697

should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.

llvm-svn: 43688

want them later (mips32/64).

llvm-svn: 43380

- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
- Fix some copy+paste bugs.

llvm-svn: 43153

llvm-svn: 43150

llvm-svn: 42960

function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)

llvm-svn: 42908

llvm-svn: 42780

- Added a function to hold the stack location 
  where GP must be stored during LowerCALL
- AsmPrinter now emits directives based on
  relocation type
- PIC_ set to default relocation type (same as GCC)

llvm-svn: 42779

- Modified instruction format to handle pseudo instructions
- Added LoadAddr SDNode to load symbols.

llvm-svn: 42778

address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.

llvm-svn: 42621

Tested with "make check"!

llvm-svn: 42346

llvm-svn: 42316

Fixed some comments

llvm-svn: 42271

llvm-svn: 41863

init_trampoline.  There is now only one
trampoline intrinsic.

llvm-svn: 41841

Patch by Sterling Stein!

llvm-svn: 41758

Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.

llvm-svn: 41597

Changed the stack frame layout, StackGrowsUp fits better to Mips strange stack.
Stack offset calculation bug fixed!

llvm-svn: 41529

Added comments about new stack allocation.
Expand SelectCC for i32 results

llvm-svn: 41527

Comments for Mips directives added.

llvm-svn: 41526

llvm-svn: 41525

llvm-svn: 41225

llvm-svn: 41224

MipsAdd SDNode created to add support to an Add opcode which supports input flag
Added an instruction itinerary to all instruction classes
Added branches with zero cond codes
Now call clobbers all non-callee saved registers
Call w/ register support added
Added DelaySlot to branch and load instructions
Added patterns to handle all setcc, brcond/setcc and MipsAdd instructions

llvm-svn: 41161

llvm-svn: 41160

llvm-svn: 41159

fixed to generate instructions (add, lui) glued!

llvm-svn: 41158